M95160-DFCS6TG(2014) Ver la hoja de datos (PDF) - STMicroelectronics

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M95160-DFCS6TG
(Rev.:2014)

16-Kbit serial SPI bus EEPROM with high-speed clock

STMicroelectronics 

M95160 M95160-W M95160-R M95160-DF

Instructions

6.8

Write Identification Page (available only in M95160-D

devices)

The Write Identification Page (WRID) instruction is used to write the Identification Page

(additional page of 32 bytes which can also be permanently locked in Read-only mode).

The Chip Select signal (S) is first driven low, and then the bits of the instruction byte,

address bytes, and at least one data byte are shifted in (MSB first) on Serial Data input (D).

Address bit A10 must be 0, other upper address bits are Don't Care (it might be easier to

define these bits as 0, as shown in Table 4). The lower address bits [A4:A0] define the byte

address inside the identification page.

The self-timed Write cycle starts from the rising edge of Chip Select (S), and continues for a

period tW (as specified in Section 9: DC and AC parameters).

Figure 16. Write identification page sequence

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The instruction is discarded, and is not executed, under the following conditions:

• If the Write Enable Latch (WEL) bit has not been set to 1 (by executing a Write Enable

instruction just before).

• If a Write cycle is already in progress.

• If the device has not been deselected, by driving high Chip Select (S), at exactly a byte

boundary (after the eighth bit, b0, of the last data byte that has been latched in).

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