M295V400B-120M1R Ver la hoja de datos (PDF) - STMicroelectronics

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componentes Descripción

Fabricante

M295V400B-120M1R

4 Mbit (512Kb x8 or 256Kb x16, Boot Block)Single Supply Flash Memory

STMicroelectronics 

M29F400T, M29F400B

Table 9. Status Register Bits

DQ

Name

Logic Level

Definition

Note

7

Data

Polling

’1’

Erase Complete or erase

block in Erase Suspend

’0’

Erase On-going

Indicates the P/E.C. status, check during

Program or Erase, and on completion

Program Complete or data

before checking bits DQ5 for Program or

Erase Success.

DQ

of non erase block during

Erase Suspend

DQ

Program On-going

’-1-0-1-0-1-0-1-’ Erase or Program On-going Successive reads output complementary

data on DQ6 while Programming or Erase

DQ

Program Complete

6 Toggle Bit

Erase Complete or Erase

’-1-1-1-1-1-1-1-’ Suspend on currently

addressed block

operations are on-going. DQ6 remains at

constant level when P/E.C. operations are

completed or Erase Suspend is

acknowledged.

5 Error Bit

’1’

Program or Erase Error

This bit is set to ’1’ in the case of

’0’

Program or Erase On-going

Programming or Erase failure.

4 Reserved

3

Erase

Time Bit

P/E.C. Erase operation has started. Only

’1’

Erase Timeout Period Expired possible command entry is Erase Suspend

(ES).

’0’

Erase Timeout Period

On-going

An additional block to be erased in parallel

can be entered to the P/E.C.

Chip Erase, Erase or Erase

Suspend on the currently

’-1-0-1-0-1-0-1-’

addressed block.

Erase Error due to the

2 Toggle Bit

currently addressed block

(when DQ5 = ’1’).

Indicates the erase status and allows to

identify the erased block

Program on-going, Erase

1

on-going on another block or

Erase Complete

DQ

Erase Suspend read on

non Erase Suspend block

1 Reserved

0 Reserved

Note: Logic level ’1’ is High, ’0’ is Low. -0-1-0-0-0-1-1-1-0- represent bit value in successive Read operations.

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