LQ121S1LG61 Ver la hoja de datos (PDF) - Sharp Electronics
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LQ121S1LG61 Datasheet PDF : 20 Pages
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8. Timing characteristics of input signals
8-1. Timing characteristics
(These are specified at the digital inputs/outputs of LVDS transmitter/receiver.)
LD18123A-8
Data
B
ENAB
Sync
CD
E
F
A
(Vertical timing)
Item(symbol)
Min.
Typ.
Max. Unit 備考
Vsync cycle (TVA)
-
17.6
628
666
Blanking period(TVB)
Vsync pulse width (TVC)
28
66
2
4
Back porch (TVD)
23
23
Vsync pulse width+Back porch
25
27
(TVC+TVD)
Active display area (TVE)
600
600
Front porch (TVF)
3
39
-
ms Negative
798
line
-
line
6
line
23
line
29
line
600
line
-
line
(Horizontal timing)
Item(symbol)
Hsync cycle (THA)
Blanking period (THB)
Hsync pulse width (THC)
Back porch (THD)
Active display area (THE)
Front porch (THF)
Min.
20.8
832
40
2
928-THA
800
0
Typ.
26.4
1056
256
128
88
800
40
Max.
39.9
1395
-
200
THA-752
800
-
Unit
us
clock
clock
clock
clock
clock
clock
Remark
Negative
(Clock signal)
Item
Min.
Typ.
Max. Unit Remark
Frequency
35
40
42
MHz [Note1]
[Note1] In case of lower frequency, the deterioration of display quality, flicker etc., may be occurred.
(Hsync-Vsync Phase difference)
Vsync
Hsync
Item(symbol)
Hsync-Vsync Phase difference (THV)
THV
Min.
Typ.
1
-
Max. Unit Remark
THA-THC clock
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