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LPC1751FBD80 Ver la hoja de datos (PDF) - NXP Semiconductors.

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LPC1751FBD80 Datasheet PDF : 80 Pages
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NXP Semiconductors
7. Pinning information
7.1 Pinning
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
61
40
80
21
Fig 2. Pin configuration LQFP80 package
002aae158
7.2 Pin description
Table 4. Pin description
Symbol
Pin
P0[0] to P0[31]
P0[0]/RD1/TXD3/ 37[1]
SDA1
P0[1]/TD1/RXD3/ 38[1]
SCL1
P0[2]/TXD0/AD0[7] 79[2]
P0[3]/RXD0/AD0[6] 80[2]
P0[6]/
I2SRX_SDA/
SSEL1/MAT2[0]
64[1]
Type
I/O
I/O
I
O
I/O
I/O
O
I
I/O
I/O
O
I
I/O
I
I
I/O
I/O
I/O
O
Description
Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each bit. The
operation of Port 0 pins depends upon the pin function selected via the pin
connect block. Some port pins are not available on the LQFP80 package.
P0[0] — General purpose digital input/output pin.
RD1 — CAN1 receiver input.
TXD3 — Transmitter output for UART3.
SDA1 — I2C1 data input/output (this is not an I2C-bus compliant open-drain pin).
P0[1] — General purpose digital input/output pin.
TD1 — CAN1 transmitter output.
RXD3 — Receiver input for UART3.
SCL1 — I2C1 clock input/output (this is not an I2C-bus compliant open-drain pin).
P0[2] — General purpose digital input/output pin.
TXD0 — Transmitter output for UART0.
AD0[7] — A/D converter 0, input 7.
P0[3] — General purpose digital input/output pin.
RXD0 — Receiver input for UART0.
AD0[6] — A/D converter 0, input 6.
P0[6] — General purpose digital input/output pin.
I2SRX_SDA — Receive data. It is driven by the transmitter and read by the
receiver. Corresponds to the signal SD in the I2S-bus specification.
(LPC1759/58/56 only).
SSEL1 — Slave Select for SSP1.
MAT2[0] — Match output for Timer 2, channel 0.
LPC1759_58_56_54_52_51
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8.6 — 18 August 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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