LH28F640SP Ver la hoja de datos (PDF) - Sharp Electronics

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LH28F640SP

64Mbit (4Mbit×16/8Mbit×8) Page Mode Flash MEMORY

Sharp Electronics 

LHF64P01

13

Table 7. Status Register Definition

R

R

R

R

R

R

R

R

15

14

13

12

11

10

9

8

WSMS

BESS

BECBLS PBPOPSBLS VPENS

PBPSS

DPS

R

7

6

5

4

3

2

1

0

SR.15 - SR.8 = RESERVED FOR FUTURE

ENHANCEMENTS (R)

NOTES:

SR.7 = WRITE STATE MACHINE STATUS (WSMS)

1 = Ready

0 = Busy

Check SR.7 or STS to determine block erase, (page buffer)

program, block lock configuration or OTP program

completion. SR.6 - SR.1 are invalid while SR.7="0".

SR.6 = BLOCK ERASE SUSPEND STATUS (BESS)

1 = Block Erase Suspended

0 = Block Erase in Progress/Completed

SR.5 = BLOCK ERASE AND CLEAR BLOCK LOCK If both SR.5 and SR.4 are "1"s after a block erase, page

BITS STATUS (BECBLS)

buffer program, block lock configuration, STS configuration

1 = Error in Block Erase or Clear Block Lock Bits

attempt, an improper command sequence was entered.

0 = Successful Block Erase or Clear Block Lock Bits

SR.4 = (PAGE BUFFER) PROGRAM, OTP PROGRAM

AND SET BLOCK LOCK BIT STATUS (PBPOPSBLS)

1 = Error in (Page Buffer) Program, OTP Program or Set

Block Lock Bit

0 = Successful (Page Buffer) Program, OTP Program or

Set Block Lock Bit

SR.3 = VPEN STATUS (VPENS)

1 = VPEN LOW Detect, Operation Abort

0 = VPEN OK

SR.3 does not provide a continuous indication of VPEN level.

The WSM interrogates and indicates the VPEN level only

after Block Erase, (Page Buffer) Program, Set Block Lock

Bit, Clear Block Lock Bits or OTP Program command

SR.2 = (PAGE

(PBPSS)

BUFFER)

PROGRAM

SUSPEND

STATUS

sequences. SR.3 is not guaranteed

when VPEN≠VPENH or VPENLK.

to

report

accurate

feedback

1 = (Page Buffer) Program Suspended

0 = (Page Buffer) Program in Progress/Completed

SR.1 does not provide a continuous indication of block lock

bit. The WSM interrogates the block lock bit only after Block

SR.1 = DEVICE PROTECT STATUS (DPS)

Erase, (Page Buffer) Program or OTP Program command

sequences. It informs the system, depending on the attempted

1 = Erase or Program Attempted on a

operation, if the block lock bit is set. Reading the block lock

Locked Block, Operation Abort

0 = Unlocked

configuration codes after writing the Read Identifier Codes/

OTP command indicates block lock bit status.

SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R) SR.15 - SR.8 and SR.0 are reserved for future use and should

be masked out when polling the status register.

Rev. 0.06

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