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HT46R51A Ver la hoja de datos (PDF) - Holtek Semiconductor

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componentes Descripción
Fabricante
HT46R51A
Holtek
Holtek Semiconductor Holtek
HT46R51A Datasheet PDF : 43 Pages
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HT46R51A/HT46R52A
Pin Description
Pin Name
PA0~PA2
PA3/PFD
PA4/TMR
PA5/INT
PA6~PA7
PB0/AN0
PB1/AN1
PB2/AN2
PB3/AN3
PB4/AN4
PD0/PWM
OSC1
OSC2
RES
VDD
VSS
VREF
I/O Options
Description
Bidirectional 8-bit input/output port. Each individual bit on this port can be config-
Pull-high ured as a wake-up input by configuration option. Software instructions determine
I/O Wake-up if the pin is a CMOS output or Schmitt trigger input. Configuration options deter-
PA3 or PFD mine which pins on this port have pull-high resistors. The PFD, TMR and external
interrupt input are pin-shared with PA3, PA4, and PA5 respectively.
Bidirectional 5-bit input/output port. Software instructions determine the CMOS
output or Schmitt trigger input with or without pull-high resistor. Configuration op-
I/O
Pull-high
tions determine which pins on this port have pull-high resistors. PB is pin-shared
with the A/D input pins. The A/D inputs are selected via software instructions
Once selected as an A/D input, the I/O function and pull-high resistor functions
are disabled automatically.
Bidirectional 1-bit input/output port. Software instructions determine the CMOS
I/O
Pull-high
PD0 or PWM
output or Schmitt trigger input with or without pull-high resistor. One configuration
option determines which pin on this port has pull-high resistor. PD0 is pin-shared
with the PWM output selected via configuration option.
I
O
OSC1, OSC2 are connected to an external RC network or external crystal (deter-
Crystal or RC mined by configuration option) for the internal system clock. For external RC sys-
tem clock operation, OSC2 is an output pin for 1/4 system clock.
I
¾
Schmitt trigger reset input, active low
¾
¾
Positive power supply
¾
¾
Negative power supply, ground
A/D Converter Reference Input voltage pins. Connect this pin to the desired A/D
I
¾
reference voltage. The VREF pin is connected to VDD for the 20-pin SOP/SSOP
package
Absolute Maximum Ratings
Supply Voltage ...........................VSS-0.3V to VSS+6.0V
Input Voltage..............................VSS-0.3V to VDD+0.3V
IOL Total ..............................................................150mA
Total Power Dissipation .....................................500mW
Storage Temperature ............................-50°C to 125°C
Operating Temperature...........................-40°C to 85°C
IOH Total............................................................-100mA
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol
Parameter
VDD
Operating Voltage
Test Conditions
VDD
Conditions
fSYS=4MHz
¾
fSYS=8MHz
IDD1
Operating Current (Crystal OSC)
3V
5V
No load, fSYS=4MHz
ADC disabled
IDD2
Operating Current (RC OSC)
3V No load, fSYS=4MHz
5V ADC disabled
IDD3
Operating Current
5V
No load, fSYS=8MHz
ADC disabled
ISTB1
3V
Standby Current (WDT Enabled)
No load, system HALT
5V
Ta=25°C
Min. Typ. Max. Unit
2.2
¾
5.5
V
3.3
¾
5.5
V
¾
0.6
1.5
mA
¾
2
4
mA
¾
0.8
1.5
mA
¾
2.5
4
mA
¾
4
8
mA
¾
¾
5
mA
¾
¾
10
mA
Rev. 1.30
3
March 6, 2009

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