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AB28F400BX-T90 Ver la hoja de datos (PDF) - Intel

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AB28F400BX-T90 Datasheet PDF : 34 Pages
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A28F400BX-T B
Bus
Command
Operation
Comments
Write
Setup
Erase
Data e 20H
Address e Within block to be
erased
Write
Erase
Data e D0H
Address e Within block to be
erased
Read
Status Register Data
Toggle OE or CE to update
Status Register
290501 – 9
Standby
Check SR 7
1 e Ready 0 e Busy
Repeat for subsequent blocks
Full status check can be done after each block or after a
sequence of blocks
Write FFH after the last block erase operation to reset the
device to Read Array Mode
Full Status Check Procedure
Bus
Command
Operation
Comments
Standby
Check SR 3
1 e VPP Low Detect
Standby
Check SR 4 5
Both 1 e Command Sequence
Error
Standby
Check SR 5
1 e Block Erase Error
SR 3 MUST be cleared if set during an erase attempt
before further attempts are allowed by the Write State
Machine
SR 5 is only cleared by the Clear Status Register
Command in cases where multiple blocks are erased
before full status is checked
If error is detected clear the Status Register before
attempting retry or other error recovery
290501 – 10
Figure 8 Automated Block Erase Flowchart
20

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