AB28F400BX-T90 Ver la hoja de datos (PDF) - Intel
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AB28F400BX-T90 Datasheet PDF : 34 Pages
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A28F400BX-T B
Bus
Operation
Command
Comments
Write
Erase
Suspend
Data e B0H
Read
Standby
Status Register Data
Toggle OE or CE to
update Status Register
Check SR 7
1 e Ready
Standby
Check SR 6
1 e Suspended
Write
Read Array
Data e FFH
Read
Write
Read array data from block
other than that being
erased
Erase Resume Data e D0H
290501 – 11
Figure 9 Erase Suspend Resume Flowchart
3 4 Power Consumption
3 4 1 ACTIVE POWER
With CE at a logic-low level and RP at a logic-
high level the device is placed in the active mode
The device ICC current is a maximum 65 mA at
10 MHz with TTL input signals
3 4 2 AUTOMATIC POWER SAVINGS
Automatic Power Savings (APS) is a low pwer fea-
ture during active mode of operation The 4-Mbit
family of products incorporate Power Reduction
Control (PRC) circuitry which basically allows the de-
vice to put itself into a low current state when it is
not being accessed After data is read from the
memory array PRC logic controls the device’s pow-
er consumption by entering the APS mode where
maximum ICC current is 3 mA and typical ICC current
is 1 mA The device stays in this static state with
outputs valid until a new location is read
3 4 3 STANDBY POWER
With CE at a logic-high level (VIH) and the CUI in
read mode the memory is placed in standby mode
where the maximum ICC standby current is 100 mA
with CMOS input signals The standby operation dis-
ables much of the device’s circuitry and substantially
reduces device power consumption The outputs
(DQ 0 15 or DQ 0 7 ) are placed in a high-imped-
ance state independent of the status of the OE
signal When the 4-Mbit boot block flash family is
deselected during erase or program functions the
devices will continue to perform the erase or pro-
gram function and consume program or erase active
power until program or erase is completed
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