AB28F400BX-T90 Ver la hoja de datos (PDF) - Intel

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AB28F400BX-T90

4-MBIT (256K x16, 512K x8) BOOT BLOCK FLASH MEMORY FAMILY

Intel 

A28F400BX-T B

290501 – 5

Bus

Command

Operation

Comments

Write

Write

Setup

Program

Program

Data e 40H

Address e Byte to be

programmed

Data to be programmed

Address e Byte to be

programmed

Read

Status Register Data

Toggle OE or CE to update

Status Register

Standby

Check SR 7

1 e Ready 0 e Busy

Repeat for subsequent bytes

Full status check can be done after each byte or after a

sequence of bytes

Write FFH after the last byte programming operation to

reset the device to Read Array Mode

Full Status Check Procedure

Bus

Operation

Command

Comments

Standby

Check SR 3

1 e VPP Low Detect

Standby

Check SR 4

1 e Byte Program Error

SR 3 MUST be cleared if set during a program attempt

before further attempts are allowed by the Write State

Machine

SR 4 is only cleared by the Clear Status Register

Command in cases where multiple bytes are programmed

before full status is checked

If error is detected clear the Status Register before

attempting retry or other error recovery

290501 – 6

Figure 6 Automated Byte Programming Flowchart

18

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