DS2407 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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Fabricante

DS2407

Dual Addressable Switch Plus 1K–Bit Memory

Dallas Semiconductor -> Maxim Integrated 

DS2407

DS2407 EQUIVALENT CIRCUIT Figure 10

1–WIRE INTERFACE

PIO CHANNEL

RX

DATA

TX

100Ω

MOSFET

GROUND

5 µA

Typ.

TO PIO

CONTROL

1–WIRE DATA

FROM PIO

CONTROL

ACTIVITY

LATCH “1”

QD

Q

RESET

EDGE

DETECTOR

PIO

10MΩ

Typ.

DQ

RQ

GROUND

CHANNEL

FLIP–FLOP

BUS MASTER CIRCUIT Figure 11

A) Open Drain

VDD

BUS MASTER

DS5000 OR 8051 EQUIVALENT

Open Drain

Port Pin

RX

TX

VPUP

5kΩ

10kΩ

S

D

2N7000

PGM

2N7000

12V

10kΩ

VP0300L

S

OR

VP0106N3

OR

D BSS110

D

D

S

S

2N7000

470 pF

TO DATA CONNECTION

OF DS2506

CAPACITOR ADDED TO REDUCE

COUPLING ON DATA LINE DUE TO

PROGRAMMING SIGNAL SWITCHING

The interface is reduced to the 5kΩ pull–up resistor if one does not intend to program the EPROM cells.

B) Standard TTL

VDD

BUS MASTER

12V

VPUP (10 mA min.)

TTL–Equivalent

Port Pins

RX

TX

5kΩ

5kΩ

PROGRAMMING PULSE

TO DATA CONNECTION

OF DS2507

The diode and Programming Pulse circuit are not required if one does not intend to program the EPROM cells.

012099 20/31

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