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DS2282 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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componentes Descripción
Fabricante
DS2282
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS2282 Datasheet PDF : 22 Pages
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DS2282
PIN DESCRIPTION Table 1
PIN
SYMBOL TYPE
1
VDD
2
RLOS
O
3
RCLK
I
4
RPOS
I
5
RNEG
6
NC
7
INT
O
8
PRMXA
O
9
DRVEN
O
10
RXD
I
11
TXD
O
12
TLCLK
I
13
SLIP
I
14
PLB
O
15
PAS
I
16
UB1
O
17
UB2
18
UB3
19
UB4
20
B8ZS
I
21
RST
I
DESCRIPTION
Positive Supply. 5.0 volts.
Receive Loss Of Sync. Indicates sync status; high when internal resync
is in progress, low otherwise.
Receive Clock. 1.544 MHz clock input. All internal time intervals are
derived from this clock. A clock must be applied to this pin or the DS2282
will not operate properly.
Receive Bipolar Data. Sampled on falling edge of RCLK. Can be tied
together to receive NRZ data and disable BPV and B8ZS detection circuit-
ry.
No Connect. Do not connect any signal to this pin.
Interrupt. Transitions low when bits in the Status Register (SR) change
state or when an unscheduled message (T1.403) or request message
(54016) is received.
PRM Transmit Active. Transitions high when a Performance Report
Message (T1.403) or response message (54016) is being sent via TLINK.
DS2282 will transmit 27 flags before each messages. The PRMXA pin will
be high for the message and flags.
Serial Port Drive Enable. Driven high when the DS2282 is transmitting
data via TXD. Can be used to enable an external line driver. Tie this pin
low to invoke 8–bit communications via the serial port.
Serial Port Receive. Serial data input; data is input asynchronously at
19.2Kbps.
Serial Port Transmit. Serial data output; data is output asynchronously
at 19.2Kbps.
Transmit Link Clock. 4 KHz demand clock for the FDL data.
Slip Occurrence Event. This edge–triggered pin should be held low for
at least 10 µs when a slip occurs locally. If local slip indications are not
available, this pin should be tied low to allow model #3 to be sent in 54016
mode.
Payload Loopback. Transitions high when the code word or message for
payload loopback activate has been received; transitions low when the
code word or message for payload loopback deactivate has been re-
ceived.
Program Address Select. Used to program the serial port address; ac-
tive high.
User Bits 1 to 4. Each user bit can be independently configured either
high or low via the UBR register. In hardware mode, tied high or low exter-
nally to configure DS2282.
B8ZS Enable. Tie low to disable B8ZS; tie high to enable B8ZS. Logically
OR’ed with the B8ZS bit in the UBR register; tie low if the B8ZS bit is to be
used to select B8ZS mode.
Reset. Active high level will initiate a reset. Contains an internal pull–
down resister.
022798 5/22

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