DS2282 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS2282 Datasheet PDF : 22 Pages
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DS2282
STATUS REGISTER SUMMARY Table 2
NAME
ADDR2,3 R/W CLEARABLE
SR
04
R
Yes
DESCRIPTION
Status Register. An 8–bit register that reports alarm
conditions. See “Status Register.”
USER REGISTER SUMMARY Table 3
NAME
ADDR2,3 R/W CLEARABLE
UBR1
14
W
No
DESCRIPTION
User Bit Register. An 8–bit register that sets the position
of the six available user bits. See “User Register.”
LOOPBACK CONTROL REGISTER SUMMARY Table 4
NAME
ADDR2,3 R/W CLEARABLE DESCRIPTION
LBCR
35
W
No
Loopback Control Register. An 8–bit register that
determines the actions of the PLB and LLB pins. See
“Loopback Control.”
SOFTWARE VERSION AND LEVEL REGISTER SUMMARY Table 4A
NAME
ADDR2,3 R/W CLEARABLE DESCRIPTION
SWVR1
3F
R
No
Software Version Register. An 8–bit register that
reports the DS2282 software version.
SWLR1
3E
R
No
Software Version Level Register. An 8–bit register
that reports the DS2282 software version level in two’s
complement format.
T1.403 REGISTER SET SUMMARY Table 5
NAME
ADDR2,3 R/W CLEARABLE
CRCCR1
08
R
Yes
BPVCR1
09
R
Yes
OOFCR1
0A
R
Yes
FECR1
0B
R
Yes
ESR1
0C
R
Yes
SESR1
0D
R
Yes
UASR1
0E
R
Yes
PRMR0
10
R
No
PRMR1
11
R
No
PRMR2
12
R
No
PRMR3
13
R
No
RUMR
18
R
Yes
DESCRIPTION
CRC Count Register. A 16–bit register that counts
CRC–6 error events.
BPV Count Register. A 24–bit register that counts bipo-
lar violations.
OOF Count Register. A 16–bit register that counts OOF
error events.
Frame Error Count Register. A 16–bit register that
counts errors in the FPS framing pattern.
Errored Second Register. A 16–bit register that counts
ES.
Severely Errored Second Register. A 16–bit register
that counts SES.
Unavailable Seconds Register. A 16–bit register that
counts UAS.
Performance Report Message Registers. Four 8–bit
registers that contain the PRMs that were received in the
FDL in the last four seconds.
Receive Unscheduled Message Register. An 8–bit
register that reports unscheduled messages as they are
received.
022798 8/22
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