CDB4923 Ver la hoja de datos (PDF) - Cirrus Logic

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componentes Descripción

Fabricante

CDB4923

Multi-Channel Digital Audio Decoders

Cirrus Logic 

CS4923/4/5/6/7/8/9

SWITCHING CHARACTERISTICS—DIGITAL AUDIO INPUT

(TA = 25 °C; VA, VD = 3.3 V ±5%; Inputs: Logic 0 = DGND, Logic 1 = VD, CL = 20 pF)

Parameter

Symbol Min

Max

Unit

SCLKN1(2) period for both Master and Slave mode

(Note 19) Tsclki

40

-

ns

SCLKN1(2) duty cycle for Master and Slave mode

(Note 19)

45

55

%

Master Mode

(Note 19,20)

LRCLKN1(2) delay after SCLKN1(2) transition

(Note 21) Tlrds

-

10

ns

SDATAN1(2) setup to SCLKN1(2) transition

(Note 22) Tsdsum

10

-

ns

SDATAN1(2) hold time after SCLKN1(2) transition

(Note 22) Tsdhm

5

-

ns

Slave Mode

(Note 23)

Time from active edge of SCLKN1(2) to LRCLKN1(2) transition

Tstlr

10

-

ns

Time from LRCLKN1(2) transition to SCLKN1(2) active edge

Tlrts

10

-

ns

SDATAN1(2) setup to SCLKN1(2) transition

(Note 22) Tsdsus

5

-

ns

SDATAN1(2) hold time after SCLKN1(2) transition

(Note 22) Tsdhs

5

-

ns

Notes: 19. Master mode timing specifications are characterized, not production tested.

20. Master mode is defined as the CS4923 driving LRCLKN1(2) and SCLKN1(2). Master or Slave mode

can be programmed.

21. This timing parameter is defined from the non-active edge of SCLKN1(2). The active edge of

SCLKN1(2) is the point at which the data is valid.

22. This timing parameter is defined from the active edge of SCLKN1(2). The active edge of SCLKN1(2) is

the point at which the data is valid.

23. Slave mode is defined as SCLKN1(2) and LRCLKN1(2) being driven by an external source.

16

DS262F2

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