BT815A Ver la hoja de datos (PDF) - Unspecified

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BT815A

VideoStream™ Decoders

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FUNCTIONAL DESCRIPTION

Functional Overview

Bt819A/7A/5A

The Synchronous Pixel Interface (non-FIFOed output) is common to all three

pin-compatible devices, which enables a single system hardware design to be used

for all three. Similarly, a common I2C register set allows a single piece of driver

code to be written for software control of all three options.

Bt819A Architecture

and Partitioning

The Bt819A has been developed to provide the most cost-effective, high-quality

video input solution for low-cost multimedia subsystems that integrate both graph-

ics display and video capabilities. The feature set of the Bt819A supports a vid-

eo/graphics system partitioning which optimizes the total cost of a system

configured both with and without video capture capabilities. This enables system

vendors to easily offer products with various levels of video support using a single

base-system design.

As graphics chip vendors move from graphics-only to video/graphics coproces-

sors and eventually to single-chip video/graphics processor implementations, the

ability to efficiently use silicon and package pins to support both graphics acceler-

ation, video playback acceleration and video capture becomes critical. This prob-

lem becomes more acute as the race towards higher performance graphics requires

more and more package pins to be consumed for wide 64-bit memory interfaces

and glueless local bus interfaces.

The Bt819A minimizes the cost of the video capture function integration in a

number of ways. Recognizing that YCrCb to RGB color space conversion is be-

coming a required feature of multimedia controllers for acceleration of digital vid-

eo playback, the Bt819A avoids redundant functionality and allows the

downstream controller to perform this task. Secondly, the Bt819A integrates the

FIFO which would otherwise be dedicated to feeding a live video stream to the di-

rect memory access engine (DMA) in a video controller. Finally, the Bt819A can

minimize the number of interface pins required by a downstream multimedia con-

troller in order to keep package costs to a minimum.

Controller systems that are designed to take advantage of these features enable

video capture capability to be added to the base system in a modular fashion using

only a single Integrated Circuit (IC).

The Bt817A and Bt815A are targeted at system configurations using

stand-alone video controllers or CODECs which typically integrate the scaling and

video FIFO functions.

UltraLock™

The Bt819A, Bt817A and Bt815A employ a proprietary technique known as Ul-

traLock to lock to the incoming analog video signal. It will always generate the re-

quired number of pixels per line from an analog source in which the line length can

vary by as much as a few microseconds. UltraLock’s digital locking circuitry en-

ables the VideoStream decoders to quickly and accurately lock on to video signals,

regardless of their source. Since the technique is completely digital, UltraLock can

recognize unstable signals caused by VCR headswitches or any other deviation

and adapt the locking mechanism to accommodate the source. UltraLock uses non-

linear techniques which are difficult, if not impossible, to implement in genlock

systems. And unlike linear techniques, it adapts the locking mechanism automati-

cally.

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