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ATTINY40

8-bit Microcontroller with 4K Bytes In-System Programmable Flash

Atmel Corporation 

ATtiny40

4.8 Register Description

4.8.1

CCP – Configuration Change Protection Register

Bit

7

6

5

4

3

2

1

0

0x3C

CCP[7:0]

CCP

Read/Write

W

W

W

W

W

W

W

W

Initial Value

0

0

0

0

0

0

0

0

• Bits 7:0 – CCP[7:0]: Configuration Change Protection

In order to change the contents of a protected I/O register the CCP register must first be written

with the correct signature. After CCP is written the protected I/O registers may be written to dur-

ing the next four CPU instruction cycles. All interrupts are ignored during these cycles. After

these cycles interrupts are automatically handled again by the CPU, and any pending interrupts

will be executed according to their priority.

When the protected I/O register signature is written, CCP0 will read as one as long as the pro-

tected feature is enabled, while CCP[7:1] will always read as zero.

Table 4-1 shows the signatures that are in recognised.

Table 4-1.

Signature

0xD8

Signatures Recognised by the Configuration Change Protection Register

Group

IOREG: CLKMSR, CLKPSR, WDTCSR(1), MCUCR(2)

Description

Protected I/O register

Notes: 1. Only WDE and WDP[3:0] bits are protected in WDTCSR.

2. Only BODS bit is protected in MCUCR.

4.8.2

SPH and SPL – Stack Pointer Register

Bit

0x3E

0x3D

Read/Write

Read/Write

Initial Value

Initial Value

15

SP15

SP7

7

R

R/W

RAMEND

RAMEND

14

SP14

SP6

6

R

R/W

RAMEND

RAMEND

13

SP13

SP5

5

R

R/W

RAMEND

RAMEND

12

SP12

SP4

4

R

R/W

RAMEND

RAMEND

11

SP11

SP3

3

R

R/W

RAMEND

RAMEND

10

SP10

SP2

2

R

R/W

RAMEND

RAMEND

9

SP9

SP1

1

R

R/W

RAMEND

RAMEND

8

SP8

SP0

0

R

R/W

RAMEND

RAMEND

SPH

SPL

• Bits 15:0 – SP[15:0]: Stack Pointer

The Stack Pointer register points to the top of the stack, which is implemented as growing from

higher memory locations to lower memory locations. Hence, a stack PUSH command decreases

the Stack Pointer. The stack space in the data SRAM must be defined by the program before

any subroutine calls are executed or interrupts are enabled.

The Stack Pointer in ATtiny40 is implemented as two 8-bit registers in the I/O space.

13

8263A–AVR–08/10

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