ADP5022 Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

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Fabricante

ADP5022

Dual 3 MHz, 600 mA Buck Regulator with 150 mA LDO

Analog Devices 

ADP5022

BUCK1 AND BUCK2 SPECIFICATIONS

VDDA = VIN1 = VIN2 = 3.6 V, VIN3 = (VOUT3 + 0.5 V) or 2.4 V, whichever is greater, VIN3 ≤ VIN1, TJ = −40°C to +125°C, unless

otherwise noted.1

Table 2.

Parameter

OPERATING SUPPLY CURRENT

Buck1 Only

Buck2 Only

Buck1 and Buck2 Only

OUTPUT VOLTAGE ACCURACY

Symbol

IGND1

IGND2

IGND1-2

VOUT1, VOUT2

POWER SAVE MODE TO PWM CURRENT

THRESHOLD

PWM TO POWER SAVE MODE CURRENT

THRESHOLD

SW CHARACTERISTICS, BUCK1 and BUCK2

PFET On Resistance

IPSM-PWM

IPWM-PSM

RPFET

NFET On Resistance

RNFET

Current Limit

OSCILLATOR FREQUENCY

START-UP TIME2

From Shutdown State

ILIMIT1, ILIMIT2

FSW

TSTARTUP12-SD

Test Conditions/Comments

Min Typ Max Unit

ILOAD1 = 0 mA, device not switching, EN1

= VDDA, EN2 = EN3 = GND

ILOAD2 = 0 mA, device not switching, EN2

= VDDA, EN1 = EN3 = GND

ILOAD1 = ILOAD1 = 0 mA, device not switch-

ing, EN1 = EN2 = VDDA, EN3 = GND

24

μA

32

μA

48 64

μA

PWM mode, VIN1 = VIN2 = 2.4 V to 5.5 V, −3

+3

%

ILOAD1 = ILOAD2 = 0 mA − 600 mA

105

mA

100

mA

Typical at VIN1 = VIN2 = 3.6 V

Typical at VIN1 = VIN2 = 5.0 V

Typical at VIN1 = VIN2 = 3.6 V

Typical at VIN1 = VIN2 = 5.0 V

PFET switch peak current limit

165 275 mΩ

125

mΩ

125 220 mΩ

100

mΩ

750 950 1050 mA

2.5 3.0 3.5 MHz

250

μs

1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control.

2 Start-up time is defined as the time from a rising edge on EN1/EN2 to VOUT1/VOUT2 reaching 90% of their nominal value.

Rev. C | Page 4 of 28

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