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74LVC595AD Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 13.
Symbol Parameter
Conditions
40 °C to +85 °C
Min Typ[1] Max
th
hold time
DS to SHCP; see Figure 9
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
trec
recovery time
MR to SHCP; see Figure 11
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
fmax
maximum
frequency
SHCP or STCP; see Figure 7
and Figure 8
1.5
0.2
-
1.5
0.1
-
1.5 0.1
-
1.0 0.2
-
5.0 2.7
-
4.0 1.5
-
2.0 1.0
-
2.0 1.0
-
tsk(o)
CPD
output skew time
power dissipation
capacitance
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 3.0 V to 3.6 V
VI = GND to VCC
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
80
130
-
100 140
-
110 150
-
130 180
-
[5]
-
-
1.0
[6]
-
50
-
-
45
-
-
44
-
40 °C to +125 °C Unit
Min
Max
2.0
-
ns
2.0
-
ns
2.0
-
ns
1.5
-
ns
5.5
-
ns
4.5
-
ns
2.5
-
ns
2.5
-
ns
70
-
MHz
90
-
MHz
100
-
MHz
115
-
MHz
-
1.5 ns
-
-
pF
-
-
pF
-
-
pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] ten is the same as tPZH and tPZL.
[4] tdis is the same as tPHZ and tPLZ.
[5] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[6] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL × VCC2 × fo) = sum of outputs.
74LVC595A_1
Product data sheet
Rev. 01 — 29 May 2007
© NXP B.V. 2007. All rights reserved.
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