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74LVC595AD Ver la hoja de datos (PDF) - NXP Semiconductors.

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74LVC595AD Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
7. Functional description
Table 3. Function table[1]
Input
SHCP STCP OE MR DS
X
X
L
L
X
X
L
L
X
X
X
H
L
X
X
L
H
H
X
L
H
X
L
H
X
[1] H = HIGH voltage state;
L = LOW voltage state;
= LOW-to-HIGH transition;
X = don’t care;
NC = no change;
Z = high-impedance OFF-state.
Output
Q7S Qn
L
NC
L
L
L
Z
Q6S NC
NC QnS
Q6S QnS
Function
a LOW-state on MR only affects the shift register
empty shift register loaded into storage register
shift register clear; parallel outputs in high impedance OFF-state
logic HIGH-state shifted into shift register stage 0. Contents of all
shift register stages shifted through, e.g. previous state of stage 6
(internal Q6S) appears on the serial output (Q7S).
contents of shift register stages (internal QnS) are transferred to
the storage register and parallel output stages
contents of shift register shifted through; previous contents of the
shift register is transferred to the storage register and the parallel
output stages
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
IIK
VI
IOK
VO
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
VI < 0 V
VO > VCC or VO < 0 V
3-state
output HIGH or LOW state
VO = 0 V to VCC
Tamb = 40 °C to +125 °C
0.5 +6.5
V
50
-
mA
[1] 0.5
+6.5
V
-
±50
mA
[1] 0.5
6.5
V
[1] 0.5
VCC + 0.5
V
-
±50
mA
-
100
mA
100 -
mA
65
+150
°C
[2] -
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO16 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K.
For TSSOP16 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW/K.
74LVC595A_1
Product data sheet
Rev. 01 — 29 May 2007
© NXP B.V. 2007. All rights reserved.
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