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AD7302BR

2.7 V to 5.5 V, Parallel Input Dual Voltage Output 8-Bit DAC

Analog Devices 

AD7302

T

VDD

1

T

2

VOA

T

3

VOB

CH1 5.00V CH2 5.00V M20.0ms CH1

CH3 5.00V

Figure 11. Power-On—RESET

10

9

VDD = 2.7 TO 5.5V

8

DAC LOADED WITH ALL ZEROES

INTERNAL REFERENCE

7

6

5

4

DAC B

3

2

DAC A

1

0

–50 –25 0 25 50 75 100 125

TEMPERATURE – C

Figure 12. Zero Code Error vs.

Temperature

WR

1

VOUT

VDD = 5V

INTERNAL VOLTAGE

REFERENCE

10 LSB STEP CHANGE

TA = +25؇C

2

CH1 5.00V, CH2 50.0mV, M 250ns

Figure 13. Small-Scale Settling Time

0.5

0.4

VDD = 5V

INTERNAL REFERENCE

0.3

5kΩ 100pf. LOAD

LIMITED CODE RANGE (10–245)

0.2 TA = +25°C

0.1

DAC A

0

–0.1

DAC B

–0.2

–0.3

–0.4

–0.5

0 32 64 96 128 160 192 224 256

INPUT CODE (10 to 245)

Figure 14. Integral Linearity Plot

0.5

0.4

0.3

0.2 VDD = 5V

INTERNAL REFERENCE

0.1

0

–0.1

–0.2

–0.3

–0.4

–0.5

–60 –40 –20 0 20 40 60 80 100 120 140

TEMPERATURE – ؇C

Figure 15. Typical INL vs. Temperature

0.5

0.4

0.3

0.2

0.1 VDD = 5V

INTERNAL REFERENCE

0

–0.1

–0.2

–0.3

–0.4

–0.5

–60 –40 –20 0 20 40 60 80 100 120 140

TEMPERATURE – ؇C

Figure 16. Typical DNL vs. Temperature

1.0

VDD = 5V

0.8

0.6

0.4

0.2

0

–60 –40 –20 0 20 40 60 80 100 120 140

TEMPERATURE – ؇C

Figure 17. Typical Internal Reference

Error vs. Temperature

1000

900

800

VDD = 5V

LOGIC INPUTS = VDD OR GND

700

600

500

400

300

200

100

0

–50 –25

0 25 50 75 100 125

TEMPERATURE – C

Figure 18. Power-Down Current vs.

Temperature

–8–

REV. 0

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