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INA-51063-TR1 Datasheet PDF : 5 Pages
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INA-51063 Applications
Information
Introduction
The INA-51063 is a silicon RFIC
amplifier with a 50 Ω input and
output. The INA-51063 is easy to
use for low noise and multi-
purpose gain block applications
up to 2.4 GHz.
Phase Reference Planes
The positions of the reference
planes used to measure
S-Parameters are shown in
Figure 9. As seen in the
illustration, the reference planes
are located at the point where the
package leads contact the test
circuit.
Biasing
The INA-51063 is a voltage biased
device and operates from a single
+5 volt power supply with a
typical current drain of only
12␣ mA. All bias regulation
circuitry is integrated into the
RFIC. The supply voltage for the
INA-51063 is fed in through the
separate VCC pin of the device and
does not require RF isolation
from the input or output. No
additional external DC compo-
nents are needed.
REFERENCE
PLANES
Operating Details
The INA-51063 is very easy to use.
The basic application of the INA-
51063 is shown in Figure 10.
DC blocking capacitors are
placed in series with the RF Input
and RF Output to isolate adjacent
stages from the internal bias
voltages that are present at these
terminals. The values of the
blocking capacitors are deter-
mined by the lowest operating
frequency. The values for the
blocking capacitors are chosen
such that their reactances are
small relative to 50 Ω. As an
example, use of the INA-51063 for
a 2.4 GHz application would
require blocking capacitors of at
least 33 pF.
The VCC connection to the ampli-
fier must be RF bypassed by
placing a capacitor to ground
directly at the bias pin of the
package. Like the DC blocking
capacitors, the value of the VCC
bypass capacitor is determined by
the lowest operating frequency
for the amplifier. This value may
typically be the same as that of
the DC blocking capacitors. If
long bias lines are used to
connect the amplifier to the VCC
supply, additional bypass capaci-
tors may be needed to prevent
resonances that would otherwise
result in undesirable gain
responses. A well-bypassed VCC
line is also desirable to prevent
possible oscillations that may
occur due to feedback through
the bias line from other stages in
a cascade.
SOT-363 PCB Layout
The INA-51063 is packaged in the
miniature SOT-363 (SC-70)
surface mount package. A PCB
pad layout for the SOT-363
package is shown in Figure 11
(dimensions are in inches). This
layout provides ample allowance
for package placement by auto-
mated assembly equipment
without adding parasitics that
could impair the high frequency
RF performance of the
INA-51063. The layout is shown
0.026
0.07
0.035
0.016
Figure 11. PCB Pad Layout
(Dimensions in Inches).
TEST CIRCUIT
Figure 9. Reference Planes.
Cblock
RF
OUTPUT
RF
INPUT Cblock
Cbypass
VCC
Figure 10. Basic Amplifier
Application.
6-154
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