28F002BC Ver la hoja de datos (PDF) - Intel
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28F002BC Datasheet PDF : 37 Pages
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E
28F002BC 2-MBIT BOOT BLOCK FLASH MEMORY
Command
Read Array
Intelligent Identifier
Read Status Register
Clear Status Register
Program Setup
Block Erase/Confirm
Erase Suspend/Resume
Table 4. Command Bus Definitions
First Bus Cycle
Notes Oper
Addr
Data
Write
X
FFH
1,2
Write
X
90H
Write
X
70H
Write
X
50H
Write
PA
40H
Write
BA
20H
Write
X
B0H
Second Bus Cycle
Oper
Addr
Data
Read
IA
IID
Read
X
SRD
Write
PA
PD
Write
BA
D0H
Write
X
D0H
ADDRESS
BA = Block Address
IA = Identifier Address
PA = Program Address
X = Don’t Care
DATA
SRD = Status Register Data
IID = Intelligent Identifier Data
PD = Program Data
NOTES:
1. Bus operations are defined in Table 2.
2. Following the Intelligent Identifier command, two read operations access manufacturer and device codes respectively.
3.3.1.1
Command Function Description
Device operations are selected by writing specific
commands into the CUI. Tables 3 and 4 define the
available commands. Status Register (SR) bits are
defined in Table 5.
Invalid/Reserved
These are unassigned commands and should not
be used. Intel reserves the right to redefine these
codes for future functions.
Read Array (FFH)
This single write cycle command points the read
path at the array. If the host CPU performs a
CE#/OE#-controlled Read immediately following a
two-write sequence (i.e., a Program or Erase
command) that started the WSM, then the device
will output status register contents. Writing two
Read Array (FFH) commands to the CUI aborts the
current operation and resets to read array mode.
Executing Read Array after the Erase Setup
command (instead of giving Erase Confirm) causes
the status register Erase and Program Status bits to
be set. This indicates that an erase operation was
initiated but not successfully confirmed (an Erase
Confirm at this point would be ignored by the CUI).
A subsequent Read Array command will point the
data path at the array (see Appendix B).
Intelligent Identifier (90H)
After this command is executed, the CUI points the
output path to the intelligent identifier circuits. Only
intelligent identifier values at addresses 0 and 1 can
be read (only address A0 is used in this mode; all
other address inputs are ignored).
PRELIMINARY
15
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