28F002BC Ver la hoja de datos (PDF) - Intel

Número de pieza

componentes Descripción

Fabricante

28F002BC

2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY

Intel 

28F002BC 2-MBIT BOOT BLOCK FLASH MEMORY

E

2.1 Memory Organization

2.1.1

BLOCKING

The 28F002BC features an asymmetrically-blocked

architecture that provides system memory

integration. Each block can be erased up to

100,000 times. The block sizes have been chosen

to optimize their functionality for common

applications of nonvolatile storage. For the address

locations of the blocks, see the memory map in

Figure 6.

2.1.1.1

Boot Block - 16 KB

The boot block is intended to replace a dedicated

boot PROM in a microprocessor or microcontroller-

based system. The 16-Kbyte (16,384 bytes) boot

block is located at the top of the address map as

shown in Figure 6. This boot block features

hardware controllable write-protection to protect the

crucial microprocessor boot code from accidental

erasure. The boot block can be erased and written

when RP# is held at 12V for the duration of the

erase or program operation. This feature allows

customers to change the boot code when

necessary while providing security at other times.

3FFFFH

3C000H

3BFFFH

3A000H

39FFFH

38000H

37FFFH

20000H

1FFFFH

00000H

28F002BC-T

16-Kbyte Boot Block

8-Kbyte Parameter Block

8-Kbyte Parameter Block

96-Kbyte Main Block

128-Kbyte Main Block

0578_05

Figure 6. 28F002BC-T Memory Map

12

2.1.1.2

Parameter Blocks - 8 KB (each)

The 28F002BC has two 8-Kbyte parameter blocks

to facilitate storage of frequently updated system

parameters that would normally require an

EEPROM. The parameter blocks can also be used

to store additional boot or main code. By using

software techniques, the byte-rewrite functionality

of EEPROMs can be emulated. These techniques

are detailed in Intel’s application note AP-604 Using

Intel’s Boot Block Flash Memory Parameter Blocks

to Replace EEPROM.

2.1.1.3

Main Block - 96 KB and 128 KB

The 28F002BC contains one 96-Kbyte (98,304

byte) block and one 128-Kbyte (131,072 byte)

block. These blocks are typically used for data or

code storage.

2.1.2

28F002BC-T BLOCK MEMORY MAP

The 16-Kbyte boot block of the 28F002BC-T is

located from 3C000H to 3FFFFH. The first 8-Kbyte

parameter block resides in memory space from

3A000H to 3BFFFH. The second 8-Kbyte

parameter block consumes the memory area from

38000H to 39FFFH. The 96-Kbyte main block

extends from 20000H to 37FFFH, while the

128-Kbyte main block occupies the region from

00000H to 1FFFFH.

3.0 PRINCIPLES OF OPERATION

Flash memory improves upon EPROM capability

with in-circuit electrical write and erase. The Boot

Block flash memory utilizes a Command User

Interface (CUI) and automated algorithms to

simplify write and erase operations. The CUI allows

for 100% TTL-level control inputs, fixed power

supplies during erasure and programming, and

maximum EPROM compatibility.

When VPP < VPPLK, the device will only successfully

execute the following commands: Read Array,

Read Status register, Clear Status register, and

Intelligent Identifier. The device provides standard

EPROM read, standby and output disable

operations. Manufacturer identification and device

identification data can be accessed through the CUI

or through the standard EPROM A9 high voltage

(VID) access for PROM programming equipment.

High voltage on VPP allows write and erase of the

device. With VPP active, all functions associated

PRELIMINARY

Share Link: