A3V56S30FTP Ver la hoja de datos (PDF) - Unspecified
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A3V56S30FTP Datasheet PDF : 40 Pages
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A3V56S30FTP
A3V56S40FTP
256M Single Data Rate Synchronous DRAM
Operation of the SDRAM
Read/Write Operations
Bank active
Before executing a read or write operation, the corresponding bank and the row address must be activated by the bank
active (ACT) command. An interval of tRCD is required between the bank active command input and the following read/write
command input.
Read operation
A read operation starts when a read command is input. Output buffer becomes Low-Z in the (/CAS Latency - 1) cycle after
read command set. The SDRAM can perform a burst read operation.
The burst length can be set to 1, 2, 4 and 8. The start address for a burst read is specified by the column address and the
bank select address at the read command set cycle. In a read operation, data output starts after the number of clocks
specified by the /CAS Latency. The /CAS Latency can be set to 2 or 3.
When the burst length is 1, 2, 4 and 8 the DOUT buffer automatically becomes High-Z at the next clock after the successive
burst-length data has been output.
The /CAS latency and burst length must be specified at the mode register.
Revision 1.1
Page 16 / 39
Mar., 2010
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