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ATF16V8C

High Performance Electrically-erasable Programmable Logic Devices

Atmel Corporation 

15. Functional logic diagram description

The logic option and functional diagrams describe the ATF16V8C architecture. Eight configurable macrocells can be

configured as a registered output, combinatorial I/O, combinatorial output, or dedicated input.

The ATF16V8C can be configured in one of three different modes. Each mode makes the ATF16V8C look like a different

device. Most PLD compilers can choose the right mode automatically. The user can also force the selection by supplying

the compiler with a mode selection. The determining factors would be the usage of register versus combinatorial outputs

and dedicated outputs versus outputs with output enable control.

The ATF16V8C universal architecture can be programmed to emulate many 20-pin PAL devices. These architectural

subsets can be found in each of the configuration modes described in the following pages. The user can download the

listed subset device JEDEC programming file to the PLD programmer, and the ATF16V8C can be configured to act like the

chosen device. Check with your programmer manufacturer for this capability.

Unused product terms are automatically disabled by the compiler to decrease power consumption. A security fuse, when

programmed, protects the content of the ATF16V8C. Eight bytes (64 fuses) of user signature are accessible to the user

for purposes such as storing project name, part number, revision, or date. The user signature is accessible regardless of the

state of the security fuse.

Table 15-1. Compiler mode selection

ABEL, Atmel-ABEL

With PD ENABLE

CUPL, Atmel-CUPL

With PD ENABLE

LOG/iC

OrCAD-PLD

PLDesigner

Synario/Atmel-Synario

With PD ENABLE

Tango-PLD

Registered

P16V8R

P16V8PDR(1)

G16V8MS

G16V8CPMS

GAL16V8_R(2)

“Registered”

P16V8R

NA

NA

G16V8R

Complex

P16V8C

P16V8PDC(1)

G16V8MA

G16V8CPMA

GAL16V8_C7(2)

“Complex”

P16V8C

NA

NA

G16V8C

Simple

P16V8AS

P16V8PD(1)

G16V8AS

G16V8CPAS

GAL16V8_C8(2)

“Simple”

P16V8C

NA

NA

G16V8AS

Note:

1. Please call Atmel PLD Hotline at (408) 436-4333 for more information

2. Only applicable for version 3.4 or lower

Auto select

P16V8

P16V8PDS(1)

G16V8A

G16V8CP

GAL16V8

GAL16V8A

P16V8A

ATF16V8C ALL

ATF16V8C (PD) ALL(1)

G16V8

16. Macrocell configuration

Software compilers support the three different OMC modes as different device types. These device types are listed in the

table below. Most compilers have the ability to automatically select the device type, generally based on the register usage

and output enable (OE) usage. Register usage on the device forces the software to choose the registered mode. All

combinatorial outputs with OE controlled by the product term will force the software to choose the complex mode. The

software will choose the simple mode only when all outputs are dedicated combinatorial without OE control. The different

device types listed in the table can be used to override the automatic device selection by the software. For further details,

refer to the compiler software manuals.

When using compiler software to configure the device, the user must pay special attention to the following restrictions in

each mode.

In registered mode, pin 1 and pin 11 are permanently configured as clock and output enable, respectively. These pins

cannot be configured as dedicated inputs in the registered mode.

In complex mode, pin 1 and pin 11 become dedicated inputs and use the feedback paths of pin 19 and pin 12

respectively. Because of this feedback path usage, pin 19 and pin 12 do not have the feedback option in this mode.

8

Atmel ATF16V8C

0425H–PLD–3/11

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