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ATF16V8C

High Performance Electrically-erasable Programmable Logic Devices

Atmel Corporation 

Atmel ATF16V8C

In simple mode, all feedback paths of the output pins are routed via the adjacent pins. In doing so, the two inner most pins

(pins 15 and 16) will not have the feedback option as these pins are always configured as dedicated combinatorial output.

16.1

Atmel ATF16V8C registered mode

PAL device emulation/PAL replacement. The registered mode is used if one or more registers are required. Each

macrocell can be configured as either a registered or combinatorial output or I/O, or as an input. For a registered output or

I/O, the output is enabled by the OE pin, and the register is clocked by the CLK pin. Eight product terms are allocated to

the sum term. For a combinatorial output or I/O, the output enable is controlled by a product term, and seven product

terms are allocated to the sum term. When the macrocell is configured as an input, the output enable is permanently

disabled.

Any register usage will make the compiler select this mode. The following registered devices can be emulated using this

mode:

16R8

16R6

16R4

16RP8

16RP6

16RP4

Figure 17. Registered configuration for registered mode(1)(2)

Notes:

1. Pin 1 controls common CLK for the registered outputs.

Pin 11 controls common OE for the registered outputs.

Pin 1 and Pin 11 are permanently configured as CLK and OE.

2. The development software configures all the architecture control bits and checks for proper pin usage automatically.

Figure 18. Combinatorial configuration for registered mode(1)(2)

Notes: 1. Pin 1 and Pin 11 are permanently configured as CLK and OE.

2. The development software configures all the architecture control bits and checks for proper pin usage automatically.

9

0425H–PLD–3/11

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