PEB20320 Ver la hoja de datos (PDF) - Infineon Technologies

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PEB20320

Multichannel Network Interface Controller for HDLC

Infineon Technologies 

PEB 20320

Introduction

Pin Definitions and Functions (cont’d)

Pin No.

Symbol

P-MQFP-160-1

90

W/R

Input (I) Function

Output (O)

O

Write/Read (Intel bus mode)

This signal distinguishes write from read

operations.

R/W

O

Read/Write (Motorola bus mode)

This signal distinguishes between read

and write operations.

In both cases this signal is tristate when

unused.

75

READY

I

Ready (Intel bus mode)

This signal indicates that the current bus

cycle is complete. When READY is

asserted during a read cycle the

MUNICH32 latches the input data and

terminates the cycle. When READY is

asserted during a write cycle the

MUNICH32 terminates the cycle.

DSACK

I

Data Transfer Acknowledge (Motorola

bus mode)

This active low input indicates that a data

transfer may be performed. During a read

cycle data becomes valid at the falling

edge of DSACK. The data is latched

internally and the bus cycle is terminated.

During a write cycle the falling edge of

DSACK marks the latching of data and the

bus cycle is terminated.

User’s Manual

15

01.2000

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