NX25P10 Ver la hoja de datos (PDF) - Unspecified

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NX25P10

1M-BIT, 2M-BIT AND 4M-BIT Serial Flash Memory with 40MHz SPI

Unspecified 

1M / 2M / 4M-BIT SERIAL FLASH MEMORY with 40MHz SPI

NX25P10, NX25P20 AND NX25P40

Read Status Register (05h)

The Read Status Register instruction allows the 8-bit Status

Register to be read. The instruction is entered by

driving CS low and shifting the instruction code “05h” into the

DI pin on the rising edge of CLK. The status register bits are

then shifted out on the DO pin at the falling edge of CLK with

most significant bit (MSB) first as shown in figure 6. The

Status Register bits are shown in figure 3 and include the

BUSY, WEL, BPO-BP2, and STP bits (see description of

the Status Register earlier in this data sheet).

The Status Register instruction may be used at any time,

even while a Program, Erase or Write Status Register cycle

is in progress. This allows the BUSY status bit to be

checked to determine when the cycle is complete and if the

device can accept another instruction. The Status Register

can be read continuously, as shown in Figure 6. The

instruction is completed by driving CS high.

CS

Mode 3

CLK Mode 0

DI

DO

* = MSB

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

Instruction (05h)

High Impedance

Status Register Out

Status Register Out

765432107654 3210 7

*

*

Figure 6. Read Status Register Instruction Sequence Diagram

12

NexFlash Technologies, Inc.

PRELIMINARY MKP-0009 Rev 6 NXSF040I-0405

04/04/05 ©

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