MT28F1284W18 Ver la hoja de datos (PDF) - Micron Technology
Número de pieza
componentes Descripción
Fabricante
MT28F1284W18 Datasheet PDF : 66 Pages
| |||
8 MEG x 16
ASYNC/PAGE/BURST FLASH MEMORY
Table 8:
SR7
0
0
1
1
Status Register SR7 and SR0 Description
SR0 DESCRIPTION
0
The addressed partition is performing a PROGRAM/ERASE operation.
FPA: Device is finished programming or verifying data or is ready for data.
1
A partition other than the one currently addressed is performing a PROGRAM/ERASE operation.
FPA: the device is either programming or verifying data.
0
No PROGRAM/ERASE operation is in progress in any partition. Erase and program suspend bits
(SR6 and SR2) indicate whether other partitions are suspended.
1
Will not occur in standard PROGRAM/ERASE operations.
FPA: This combination will not occur.
READ Operations
The following READ operations are available: READ
ARRAY, READ DEVICE IDENTIFIER, READ QUERY,
and READ STATUS REGISTER.
Note that READ DEVICE IDENTIFIER, READ
QUERY, and READ STATUS REGISTER will read in
either asynchronous or single burst mode.
Read Array
The array is read by entering the command code
FFh on DQ0–DQ7 to each partition to be read. Control
signals CE#, ADV#, and OE# must be at a logic LOW
level (VIL) and WE# and RST# must be at a logic HIGH
level (VIH) to read data from the array. Data is available
on DQ0–DQ15. Upon device reset, all partitions
default to the read array mode. To return the addressed
partition to read array mode, write the read array com-
mand code (FFh) on DQ0–DQ7.
Read Device Identifier
The read device identifier mode outputs five types
of information: the manufacturer and device identifier,
the block locking status, the read configuration regis-
ter, and the protection register data. Two bus cycles are
required for this operation: the device identifier data is
read by entering the command code 90h on DQ0–DQ7
and the identification code address on the address
lines. Control signals CE#, ADV#, and OE# must be at a
logic LOW level (VIL), and WE# and RST# must be at a
logic HIGH level (VIH) to read device identifier data.
Data is available on DQ0–DQ15. To return the
addressed partition to read array mode, write the read
array command code (FFh) on DQ0–DQ7. See Table 15
on page 36 for more details.
Read Query
The read query mode outputs common flash inter-
face (CFI) data when the device is read. (See Table 26
on page 59 for more information.) Two bus cycles are
required for this operation. It is possible to access the
query by writing the read query command code 98h on
DQ0–DQ7. Control signals CE#, ADV#, and OE# must
be at a logic LOW level (VIL) and WE# and RST# must
be at a logic HIGH level (VIH) to read data from the
query. The CFI data structure contains information
such as block size, density, command set, and electri-
cal specifications. To return the addressed partition to
read array mode, write the read array command code
(FFh) on DQ0–DQ7.
Read Status Register
The status register provides the status of the device
to the external microprocessor. The status register is
read by entering the command code 70h on DQ0–DQ7.
The address for both cycles must be in the same parti-
tion. Status register data is updated and latched on the
falling edge of OE#, on the falling edge of CE#, or on
the clock edge which starts a burst (whichever occurs
last). See “Burst Read Mode” on page 16 for BURST
operation. Latching the data prevents errors from
occurring if the register input changes while monitor-
ing the status register.
The status register outputs the data on DQ0–DQ7.
Table 7 contains the status register definitions.
To return the addressed partition to read array
mode, write the read array command code (FFh) on
DQ0–DQ7.
09005aef80b425b4
MT28F1284W18_D.fm - Rev. D, 11/03 EN
15
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology. Inc.
Share Link: 