MAX7300 Ver la hoja de datos (PDF) - Maxim Integrated
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MAX7300 Datasheet PDF : 20 Pages
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2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port I/O Expander
Pin Description
PIN
NAME
28 SSOP 28 TQFN-EP 36 SSOP 40 TQFN-EP
1
26
1
36
ISET
2, 3
27, 28
2, 3
37, 38, 39
GND
4
1
4
40
AD0
5–24
—
—
25
26
27
2–21
—
—
22
23
24
—
5–32
—
33
34
35
—
P 12–P 31
1–10, 12–19,
21–30
11, 20, 31
32
33
P4–P31
N.C.
SDA
SCL
34
AD1
28
25
36
35
V+
—
—
—
—
EP
FUNCTION
Bias Current Setting. Connect ISET to GND through a resistor
(RISET) value of 39kΩ to 120kΩ.
Ground
Address Input 0. Sets device slave address. Connect to either
GND, V+, SCL, SDA to give four logic combinations. See Table 3.
I/O Ports. P12 to P31 can be configured as push-pull outputs,
CMOS-logic inputs, or CMOS-logic inputs with weak pullup resistor.
I/O Ports. P4 to P31 can be configured as push-pull outputs,
CMOS-logic inputs, or CMOS-logic inputs with weak pullup resistor.
No Connection. Not internally connected.
I2C-Compatible Serial-Data I/O
I2C-Compatible Serial-Clock Input
Address Input 1. Sets device slave address. Connect to either
GND, V+, SCL, SDA to give four logic combinations. See Table 3.
Positive Supply Voltage. Bypass V+ to GND with minimum
0.047µF capacitor.
Exposed Pad (TQFN Only). EP is internally connected to GND.
Connect to a large ground plane to maximize thermal
performance. Not intended as an electrical connection point.
Detailed Description
The MAX7300 general-purpose input/output (GPIO)
peripheral provides up to 28 I/O ports, P4 to P31, con-
trolled through an I2C-compatible serial interface. The
ports can be configured to any combination of logic inputs
and logic outputs, and default to logic inputs on power-up.
Figure 1 is the MAX7300 functional diagram. Any I/O port
can be configured as a push-pull output (sinking 10mA,
sourcing 4.5mA), or a Schmitt-trigger logic input. Each
input has an individually selectable internal pullup resis-
tor. Additionally, transition detection allows seven ports
(P24 to P30) to be monitored in any maskable combina-
tion for changes in their logic status. A detected transi-
tion is flagged through a status register bit, as well as an
interrupt pin (port P31), if desired.
The port configuration registers individually set the 28
ports, P4 to P31, as GPIO. A pair of bits in registers
0x09 through 0x0F sets each port’s configuration
(Tables 1 and 2).
The 36-pin MAX7300AAX and 40-pin MAX7300ATL have
28 ports, P4 to P31. The 28-pin MAX7300ANI,
MAX7300AAI, and MAX7300ATI have only 20 ports avail-
able, P12 to P31. The eight unused ports should be
configured as outputs on power-up by writing 0x55 to
registers 0x09 and 0x0A. If this is not done, the eight
unused ports remain as unconnected inputs and quies-
cent supply current rises, although there is no damage
to the part.
Register Control of I/O Ports
Across Multiple Drivers
The MAX7300 offers 20 or 28 I/O ports, depending on
package choice. Two addressing methods are avail-
able. Any single port (bit) can be written (set/cleared)
at once; or, any sequence of eight ports can be written
(set/cleared) in any combination at once. There are no
boundaries; it is equally acceptable to write P0 to P7,
P1 to P8, or P31 to P38 (P32 to P38 are nonexistent, so
the instructions to these bits are ignored).
Shutdown
When the MAX7300 is in shutdown mode, all ports are
forced to inputs, and the pullup current sources are
turned off. Data in the port and control registers remain
unaltered, so port configuration and output levels are
restored when the MAX7300 is taken out of shutdown.
The MAX7300 can still be programmed while in shut-
down mode. For minimum supply current in shutdown
mode, logic inputs should be at GND or V+ potential.
Shutdown mode is exited by setting the S bit in the con-
figuration register (Table 8).
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