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MAX7300 Ver la hoja de datos (PDF) - Maxim Integrated

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MAX7300 Datasheet PDF : 20 Pages
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2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port I/O Expander
START CONDITION
SCL
1
2
SDA
BY TRANSMITTER
S
SDA
BY RECEIVER
CLOCK PULSE FOR ACKNOWLEDGMENT
8
9
Figure 5. Acknowledge
SDA
1
0
MSB
SCL
0
A3
A2
A1
A0
R/W
ACK
LSB
Figure 6. Slave Address
Operation with Multiple Masters
If the MAX7300 is operated on a 2-wire interface with
multiple masters, a master reading the MAX7300 should
use a repeated start between the write, which sets the
MAX7300’s address pointer, and the read(s) that takes
the data from the location(s). This is because it is possi-
ble for master 2 to take over the bus after master 1 has
set up the MAX7300’s address pointer, but before
master 1 has read the data. If master 2 subsequently
changes, the MAX7300’s address pointer, then master
1’s delayed read can be from an unexpected location.
Command Address Autoincrementing
Address autoincrementing allows the MAX7300 to be
configured with the shortest number of transmissions
by minimizing the number of times the command
address needs to be sent. The command address
stored in the MAX7300 generally increments after each
data byte is written or read (Table 4).
Initial Power-Up
On initial power-up, all control registers are reset and
the MAX7300 enters shutdown mode (Table 6).
Transition (Port Data Change) Detection
Port transition detection allows any combination of the
seven ports P24–P30 to be continuously monitored for
changes in their logic status (Figure 10). A detected
change is flagged on the transition detection mask reg-
ister INT status bit, D7 (Table 10). If port P31 is config-
ured as an output (Tables 1 and 2), then P31 also
automatically becomes an active-high interrupt output
(INT), which follows the condition of the INT status bit.
Port P31 is set as output by writing bit D7 = 0 and bit
D6 = 1 to the port configuration register (Table 1). Note
that the MAX7300 does not identify which specific
port(s) caused the interrupt, but provides an alert that
one or more port levels have changed.
The mask register contains 7 mask bits that select
which of the seven ports P24–P30 are to be monitored
(Table 10). Set the appropriate mask bit to enable that
port for transition detect. Clear the mask bit if transi-
10 ______________________________________________________________________________________

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