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EM73201 Ver la hoja de datos (PDF) - ELAN Microelectronics

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EM73201 Datasheet PDF : 30 Pages
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EM73201
4-BIT MICRO-CONTROLLER FOR GENERAL PURPOSE PRODUCT
Preliminary
LDL #5h;
LDH #3h;
STDMI #0Ah; RAM[35] Ah
(3) For instruction : SELP, CLPL, TFPL, L regieter be a pointer to indicate the bit of I/O port.
When LR = C - F, indicate P7.0 - P7.3
PROGRAM EXAMPLE: To set bit 2 of Port7 to "1"
LDL #0Eh;
SEPL ; P7.2 1
STACK POINTER (SP)
Stack pointer is a 4-bit register which stores the present stack level number.
Before using stack, user must set the SP value first, CPU will not initiate the SP value after reset condition
. When a new subroutine is accepted, the SP will be decreased one automatically, in another word, if
returning from a subroutine, the SP will be increased one .
The data transfer between ACC and SP is by instruction of "LDASP" and "STASP".
DATA POINTER (DP)
Data pointer is a 12-bit register which stores the address of ROM can indicate the ROM code data
specified by user (refer to data ROM).
CLOCK AND TIMING GENERATOR
The clock generator is supported by a single clock system, the clock source comes from crystal (resonator
or RC oscillation is decided by mask option . the working frequency range is 32 K Hz to 5 MHz depending
on the working voltage.
CLOCK AND TIMING GENERATOR STRUCTURE
The clock generator connects outside compoments ( crystal or resonator by XIN and XOUT pin for crystal
osc type, Resistor and capacitor by CLK pin for RC osc type, these two type is decided by mask option ).
the clock generator generates a basic system clock "fc".
When CPU sleeping, the clock generator will be stoped until the sleep condition released.
The system clock control generates 4 basic phase signals ( S1, S2, S3, S4 ) and system clock .
XIN/CLK
XOUT
Mask option
sleep
Mask option for choose Crystal or RC oscillation
fc
clock generator
System clock control
System clock
S1 S2 S3 S4
* This specification are subject to be changed without notice.
7.20.1999 11

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