CXD2463 Ver la hoja de datos (PDF) - Sony Semiconductor

Número de pieza

componentes Descripción

Fabricante

CXD2463

Timing Controller for CCD Camera

Sony Semiconductor 

CXD2463R

4) VReset + HPLL (SYNC Input) Mode

When the specified sync signal is externally input to EHD/SYNC (Pin 38), the EXT-HD separated from this

sync signal is output from HD (Pin 36). This signal is input through the shifter to EVD (Pin 37). At this time, the

CXD2463R sync signal is output as shown below based on the amount by which EXT-HD is shifted. (The

phase can be shifted up to ±1/2H with respect to the falling edge of EXT-HD.)

COMP (Pin 39) outputs the result of comparing the phase of the falling edge of the shifted EXT-HD (signal

input to Pin 37) and the falling edge of the CXD2463R internal HD. The polarity is compatible with the active

filter.

• EIA/ODD

EXT-SYNC

(Pin 38 input)

EXT-VD

(Generated inside

the CXD2463R)

EXT-HD

(Pin 36 output)

(1) Same phase

SFT-HD (1)

(Pin 37 input)

VD

(Pin 35 output)

HD

(Generated inside

the CXD2463R)

SYNC

(Pin 25 output)

1/2H 1/2H

(2) Delayed phase

SFT-HD (2)

VD

HD

SYNC

(3) Advanced phase

SFT-HD (3)

VD

HD

SYNC

∗ SFT-HD (1) to (3) are the signals after shifting EXT-HD.

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