CXD2463R
3. External Sync Function
The CXD2463R supports the three modes of Line-Lock, VReset + HPLL (VD and HD inputs), and VReset +
HPLL (Sync input) as the external sync functions. Each mode is automatically switched according to the
combination of signals input to EHD/SYNC (Pin 38) and EVD (Pin 37).
1) Automatic External Sync Discrimination
I/O
Symbol
Pin
No.
EHD/SYNC and EVD pins signal input state
and HVDET and EXT pins discrimination results
I EHD/SYNC 38
HD
No signal
HD
SYNC
No signal
I EVD
37 No signal
VD
VD
HD after SYNC
separation
No signal
O HVDET
33
L
H
L
L
L
O EXT
34
L
H
H
H
L
Mode
INT
LL
VReset
+ HPLL
VReset
+ HPLL
INT
• If unspecified signals are input for the external signals given above, there may be recognition errors.
2) LL (Line-Lock) Mode
When the V sync clock is externally input to EVD (Pin 37), the result of comparing the falling edge of the clock
and the falling edge of the internal VD is output from COMP (Pin 39). The output polarity is compatible with the
active filter.
EXT-VD
(Pin 37)
INT-VD
(Pin 35)
COMP
(Pin 39)
High impedance state
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