22051AKHC Ver la hoja de datos (PDF) - Fairchild Semiconductor

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22051AKHC

Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit

Fairchild Semiconductor 

TMC22x5yA

Reg Bit Name

Function

2D 2 YOFF18

Y offset, msb

2D 1-0 SG17-0

Msync gain, 2 msbs

2E 7-1 SYSPH16-0 7 lsbs of phase

2E 0 VAXIS1

V axis flip

2F 7-0 SYSPH114-7 8 msbs of phase

Video Measurement

30 7

set to zero

30 6 LGF

Line grab flag

30 5 LGEN

Line grab enable

30 4 LGEXT

Ext line grab enable

30 3

reserved, set to zero

30 2 PGG

Pixel grab gate

30 1 PGEN

Pixel grab enable

30 0 PGEXT

Ext pixel grab enable

31 7-0 PG7-0

Pixel grab, 8 lsbs

32 7-0 LG7-0

Line grab, 8 lsbs

33 7

reserved, set to zero

33 6-4 FG

Field grab number

33 3 LG8

Msb of line grab

33 2-0 PG10-8

Pixel grab, 3 msbs

34 7-0 GY9-2

G/Y grab, 8 msbs

35 7-0 BU9-2

B/U grab, 8 msbs

36 7-0 RV9-2

R/V grab, 8 msbs

37 7-6

reserved

37 5-4 GY1-0

G/Y grab, 2 lsbs

37 3-2 BU1-0

B/U grab, 2 lsbs

37 1-0 RV1-0

R/V grab, 2 lsbs

38 7-0 Y9-2

Luma grab, 8 msbs

39 7-0 M9-2

Msync grab, 8 msbs

3A 7-0 U9-2

U grab, 8 msbs

3B 7-0 V9-2

V grab, 8 msbs

3C 7-6 Y1-0

Luma grab, 2 lsbs

3C 5-4 M1-0

Msync grab, 2 lsbs

3C 3-2 U1-0

U grab, 2 lsbs

3C 1-0 V1-0

V grab, 2 lsbs

Test Control

3D 7-0 TEST

Must be set to zero

3E 7-0 TEST

Must be set to zero

Vertical Blanking Control

3F 7 VBIT20

V bit control

3F 6 PEDDIS

Pedestal control

3F 5-0 CCDEN5-0 Closed caption control

Auto-increment stops at 3F

10

PRODUCT SPECIFICATION

Reg Bit Name

Function

Status - Read Only

40 7-0 DDSPH

DDS phase, 8 msbs

41 7 LINEST

Pixel count reset

41 6 BGST

Start of burst gate

41 5 VACT2

Half line flag

41 4 PALODD PAL Ident

41 3 VFLY

Vertical count reset

41 2 FGRAB

Field grab

41 1 LGRAB

Line grab

41 0 PGRAB

Pixel grab

42 7 FLD

Field flag (F in D1 output)

42 6 VBLK

Vertical blanking (V in D1

output)

42 5 HBLK

Horizontal blanking (H in

D1 output)

42 4-0 LID

Line identification

43 7 YGO

Y/G overflow

43 6 YGU

Y/G underflow

43 5 UBO

43 4 UBU

43 3 VRO

43 2 VRU

43 1-0

CB/B overflow

CB/B underflow

CR/R overflow

CR/R underflow

reserved

44 7 MONO

Color kill active

44 6-0 FPERR

Frequency/Phase error

45 7-0 DRS

DRS signal

46 7-0 PARTID

47 7-0 REVID

Reads back xxh

Revision number

48- 7-0

4A

reserved

4B 7 PKILL

Phase kill from comb fail

4B 6-5 CFSTAT Comb filter status

4B 4-0 XOP

XLUT output

4C- 7-0

FF

reserved

Notes:

1. Functions are listed in the order of reading and writing.

2. For each register listed above up to register 3F, all bits not

specified are reserved and must be set to zero to ensure

proper operation.

REV. 1.0.0 2/4/03

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