AD1803 Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Fabricante

AD1803

Modem/Telephony Codec

Analog Devices 

TIMING DIAGRAMS

RESET

BIT_CLK

tRST_LOW

tRST2CLK

Figure 2. Cold RESET

SYNC

BIT_CLK

tSYNC_HIGH

tSYNC2CLK

Figure 3. Warm RESET

BIT_CLK

SYNC

tCLK_LOW

tCLK_HIGH

tCLK_PERIOD

tSYNC_LOW

tSYNC_HIGH

tSYNC_PERIOD

Figure 4. Clock Timing

tSETUP

BIT_CLK

SYNC

SDATA_OUT

tHOLD

Figure 5. Data Setup and Hold

AD1803

BIT_CLK

tRISECLK

tFALLCLK

SYNC

tRISESYNC

tFALLSYNC

SDATA_IN

tRISEDIN

tFALLDIN

SDATA_OUT

tRISEDOUT

tFALLDOUT

Figure 6. Signal Rise and Fall Time

BIT_CLK

SDATA_IN

tCO

Figure 7. Propagation Delay

SYNC SLOT 1 SLOT 2

BIT_CLK

SDATA_OUT

WRITE DATA

TO 0x56 MLNK

DON’T

CARE

tS2_PDOWN

SDATA_IN

NOTES

1. BIT_CLK IS NOT TO SCALE.

Figure 8. AC Link Low Power Mode Timing

Rev. A | Page 7 of 32

Share Link: