S-24CM01C Ver la hoja de datos (PDF) - Unspecified

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S-24CM01C

2-WIRE SERIAL E2PROM

Unspecified 

2-WIRE SERIAL E2PROM

S-24CM01C

Rev.2.0_03_S

7. Read

7. 1 Current address read

Either in writing or in reading, the S-24CM01C holds the last accessed memory address. The memory address is

maintained as long as the power voltage does not decrease less than the operating voltage.

The master device can read the data at the memory address of the current address pointer without assigning the

word address as a result, when it recognizes the position of the address pointer in the S-24CM01C. This is called

“Current Address Read”.

In the following, the address counter in the S-24CM01C is assumed to be “n”.

When the S-24CM01C receives a 7-bit device address and a 1-bit read / write instruction code set to “1” following

a start condition, it responds with an acknowledge.

Next, an 8-bit data at the address “n” is sent from the S-24CM01C synchronous to the SCL clock. The address

counter is incremented and the content of the address counter becomes n  1.

The master device outputs stop condition not an acknowledge, the reading of S-24CM01C is ended.

S

T

R

A

E

R

DEVICE

A

T

ADDRESS

D

NO ACK from

Master Device

S

T

O

P

SDA LINE

1 0 1 0 A2 A1 X 1 D7 D6 D5 D4 D3 D2 D1 D0

M

LR A

DATA

S

S/ C

B

BW K

Figure 15 Current Address Read

Attention should be paid to the following point on the recognition of the address pointer in the S-24CM01C.

When reading, the memory address counter in the S-24CM01C is automatically incremented after the 8th bit of

data is output. When writing, on the other hand, the upper bits of the memory address (the upper bits of the word

address and the page address*1) are left unchanged and are not incremented.

1. The upper 8 bits of the word address and the page address (P0)

16

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