IR2125SPBF Ver la hoja de datos (PDF) - Infineon Technologies
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IR2125SPBF Datasheet PDF : 17 Pages
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IR2125(S) & (PbF)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
Min.
Max. Units
VB
VS
VHO
VCC
VIN
VERR
VCS
dVs/dt
PD
High Side Floating Supply Voltage
High Side Floating Offset Voltage
High Side Floating Output Voltage
Logic Supply Voltage
Logic Input Voltage
Error Signal Voltage
Current Sense Voltage
Allowable Offset Supply Voltage Transient
Package Power Dissipation @ TA ≤ +25°C (8 lead PDIP)
(16 lead SOIC)
-0.3
VB - 25
VS - 0.3
-0.3
-0.3
-0.3
VS - 0.3
—
—
—
525
VB + 0.3
VB + 0.3
25
VCC + 0.3
VCC + 0.3
VB + 0.3
50
1.0
1.25
V
V/ns
W
RthJA
Thermal Resistance, Junction to Ambient (8 lead PDIP)
—
(16lLead SOIC)
—
125
°C/W
100
TJ
Junction Temperature
TS
Storage Temperature
TL
Lead Temperature (Soldering, 10 seconds)
—
150
-55
150
°C
—
300
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
VB
VS
VHO
VCC
VIN
VERR
VCS
TA
Definition
High Side Floating Supply Voltage
High Side Floating Offset Voltage
High Side Floating Output Voltage
Logic Supply Voltage
Logic Input Voltage
Error Signal Voltage
Current Sense Signal Voltage
Ambient Temperature
Min.
VS + 12
Note 1
VS
0
0
0
VS
-40
Max.
VS + 18
500
VB
18
VCC
VCC
VB
125
Units
V
°C
Note 1: Logic operational for VS of -5 to +500V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2
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