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1EDS5663H

GaN EiceDRIVER™ product family

Infineon Technologies 

GaN EiceDRIVER™ product family

GaN gate driver

Functional description

3.3

Power supply

Due to the isolation between input and output side, two power domains with independent power management

are required. Undervoltage Lockout (UVLO) functions for both input and output supplies ensure a defined start-

up and robust functionality under all operating conditions.

3.3.1 Input supply voltage

The input die is supplied via VDDI with a nominal voltage of 3.3 V. Power consumption to some extent depends

on switching frequency, as the input signal is converted into a train of repetitive current pulses to drive the

coreless transformer. Due to the chosen robust encoding scheme the average repetition rate of these pulses and

thus the average supply current depends on the switching frequency fsw. However, for fsw < 500 kHz this effect is

very small.

The input side can also be operated with supply voltages higher than 3.3 V. Then a shunt LDO voltage regulator

(SLDO) is enabled by connecting pin SLDO to GND. The SLDO regulates the current through an external resistor

RVDDI connected between the external supply voltage VDD and pin VDDI as depicted in the typical application

circuit on Page 1 to generate the required voltage drop. For proper operation it has to be ensured that the current

through RVDDI always exceeds the maximum supply current IVDDI,max of the input chip. RVDDI thus has to fulfil

(3.1)

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Then Ishunt, the excess current through RVDDI, can be controlled by the SLDO to regulate VDDI to a constant 3.3 V. A

typical choice for VDD = 5 V could be RVDDI = 470 Ω, resulting in sufficient margin between resistor current and

maximum average operating current. As usual, the dynamic peak current is provided by a blocking cap (10 to 22

nF) between VDDI and GNDI.

3.3.2 Output supply voltage

Both output dies and the respective output switches are supplied by a common voltage of typically 8 V between

pins VDDS/G and GNDS/G. A ceramic bypass capacitance in the 20 to 100 nF range has to be placed close to the

supply pins. The output supply must be floating with respect to the input supply system. This is not only required

by the Kelvin source connection of the GaN switch (results in inductive voltage peaks between input and output

ground during switching transient), but also by the differential driving concept as explained in Chapter 2.

Again the minimum operating supply voltage is set by an undervoltage lockout function (UVLOout), operating

independently of the input UVLO function.

3.3.3 Power dissipation

The main power components associated with gate drive are the following: as usual, a first small part (< 20 mW) is

due to the internal driver supply currents IVDDI and IVDDO; they slightly depend on switching frequency via the CT

encoding scheme (see Typical characteristics in Chapter 6). The second component results from charging the

gate capacitance and is in the same range due to the low gate charge of GaN switches.

However, there are 2 more GaN-specific power components. The continuous gate current any CoolGaN™ switch

requires in the steady on-state causes some tens of mW to be dissipated. And, as a consequence of the differential

driving concept, additional power is dissipated during longer non-switching periods; this is associated with the

application of VDDO as negative gate-to-source voltage, because VDDO is then loaded directly with Rss (see

Figure 5). In burst-mode operation the power depends on the burst/pause ratio and is typically also only a few

tens of mW. During extended stand-by modes, however, powering down the VDDO supply could save about

Final datasheet

10

Rev. 2.3

2020-10-22

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