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FAD6263 Ver la hoja de datos (PDF) - ON Semiconductor

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FAD6263
ON-Semiconductor
ON Semiconductor ON-Semiconductor
FAD6263 Datasheet PDF : 16 Pages
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FAD6263
Table 2. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
HighSide Floating Supply Voltage
HighSide Floating Offset Voltage
HighSide Floating Output Voltage
LowSide and LogicFixed Supply Voltage
Logic Input Voltage (IN, SD, SR)
Programmable DeadTime Pin Voltage
LowSide Output Voltage
Power Ground
Allowable Offset Voltage Slew Rate
Power Dissipation (Note 2)
Thermal Resistance, JunctiontoAmbient
(Do not exceed PD under any circumstances Note 3)
VB
VS
VHO
VDD
VIN
DT
VLO
COM
dVS/dt
PD
θJA
0.3 to 625
(VB – 25) to (VB + 0.3)
(VS – 0.3) to (VB + 0.3)
0.3 to 25
0.3 to (VDD + 0.3)
0.3 to (VDD + 0.3)
(COM – 0.3) to (VDD + 0.3)
(VDD – 25) to (VDD + 0.3)
50
0.86
145
V
V
V
V
V
V
V
V
V/ns
W
°C/W
Maximum Junction Temperature
Storage Temperature Range
TJ(max)
TSTG
150
°C
55 to 150
°C
ESD Capability, Human Body Model (Note 4)
ESDHBM
2
kV
ESD Capability, Charged Device Model (Note 4)
ESDCDM
2
kV
Moisture Sensitivity Level
MSL
1
Lead Temperature Soldering Reflow (SMD Styles Only),
PbFree Versions (Note 5)
TSLD
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. Do not exceed PD under any circumstances.
3. Refer to the following standards:
JESD512: Integral circuits thermal test method environmental conditions natural convection
JESD513: Low effective thermal conductivity test board for leaded surface mount packages
4. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per ANSI/ESDA/JEDEC JS0012012
ESD Charged Device Model tested per JESD22C101
5. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Table 3. RECOMMENDED OPERATING RANGES
Rating
Symbol
Min
Max
Unit
HighSide Vs Floating Supply Offset Voltage (Note 6)
VS
5 – VBS
600
V
Highside VBS Bootstrap Voltage
VBS
VBSUV+
22
V
HighSide Output Voltage
VHO
VS
VB
V
LowSide and Logic Supply Voltage
VDD
VDDUV+
22
V
LowSide Output Voltage
VLO
COM
VDD
V
Logic Input Voltage (IN, SD, SR)
VIN
VSS
VDD
V
Programmable DeadTime Pin Voltage
DT
VSS
VDD
V
Power Ground
COM
VDD 22
VDD
V
Ambient Temperature (Note 7)
TA
40
125
°C
External Shutdown Input PullUp Resistance (Note 8)
RSDext
3.1
12.4
kW
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
6. Recommended based on min 5 V on VB, for proper operation of the level shifter circuit and ensure proper propagation of the signal from
the input to the output.
7. Power and thermal impedance should be determined with case so TJ does not exceed 150°C.
8. Pulled up to 5 V.
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