LH28F016SUN-N80 Ver la hoja de datos (PDF) - Sharp Electronics

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Fabricante

LH28F016SUN-N80

2M (256K × 8) Flash Memory

Sharp Electronics 

LH28F020SU-N

2M (256K × 8) Flash Memory

START

WRITE 20H

WRITE D0H AND

BLOCK ADDRESS

READ COMPATIBLE

STATUS REGISTER

SUSPEND

NO ERASE LOOP

0

CSR.7 =

SUSPEND YES

ERASE

1

CSR FULL STATUS

CHECK IF DESIRED

BUS

OPERATION

COMMAND

COMMENTS

Write

Write

Read

Block Erase D = 20H

A=X

Confirm

D = D0H

A = BA

Q = CSRD

Toggle CE or OE

to update CSRD.

A=X

Standby

Check CSR.7

1 = WSM Ready

0 = WSM Busy

Repeat for subsequent Block Erasures.

CSR Full Status Check can be done after each Block Erase,

or after a sequence of Block Erasures.

Write FFH after the last operation to reset

device to read array mode.

See Command Bus Cycle notes for description of codes.

OPERATION

COMPLETE

CSR FULL STATUS CHECK PROCEDURE

READ CSRD

(see above)

0

CSR.4, 5 =

1

ERASE

SUCCESSFUL

1

CSR.3 =

0

CLEAR CSRD

RETRY/ERROR

RECOVERY

VPP LOW

DETECT

BUS

OPERATION

COMMAND

COMMENTS

Standby

Check CSR.4, 5

1 = Erase Error

0 = Erase Successful

Both 1 = Command

Sequence Error

Standby

Check CSR.3

1 = VPP Low Detect

0 = VPP OK

CSR.3, 4, 5 should be cleared, if set, before further attempts

are initiated.

Figure 6. Block Erase with Compatible Status Register

28F020SUN80-5

10

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