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M5M54R01J-12 Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC

Número de pieza
componentes Descripción
Fabricante
M5M54R01J-12
Mitsubishi
MITSUBISHI ELECTRIC  Mitsubishi
M5M54R01J-12 Datasheet PDF : 6 Pages
1 2 3 4 5 6
MITSUBISHI LSIs
M5M54R01J-12,-15
4194304-BIT (4194304-WORD BY 1-BIT) CMOS STATIC RAM
FUNCTION
The operation mode of the M5M54R01J is determined by a
combination of the device control inputs S, W and OE. Each
mode is summarized in the function table.
A write cycle is executed whenever the low level W overlaps
with the low level S. The address must be set-up before the
write cycle and must be stable during the entire cycle.
The data is latched into a cell on the trailing edge of W or S,
whichever occurs first, requiring the set-up and hold time
relative to these edge to be maintained. The output enable
input OE directly controls the output stage. Setting the OE at a
high level, the output stage is in a high impedance state, and
the data bus
contention problem in the write cycle is eliminated.
A read cycle is excuted by setting W at a high level and OE
at a low level while S are in an active state (S=L).
When setting S at high level, the chip is in a non-selectable
mode in which both reading and writing are disable. In this
mode, the output stage is in a high-impedance state, allowing
OR-tie with other chips and memory expansion by S.
Signal-S controls the power-down feature. When S goes
high, power dissapation is reduced extremely. The access
time from S is equivalent to the address access time.
The RAM works with an organization of 4194304-word by 1
bit,when B1/B4 is low of floating. And an organization of 1048
576-word by 4bit is also obtained for reducing the test time,
when B1/B4 is high.
FUNCTION TABLE
S W OE
HXX
LLX
L HL
L HH
Mode
Non selection
Write
Read
D
High-impedance
Din
High-impedance
High-impedance
Q
High-impedance
High-impedance
Dout
High-impedance
Icc
Stand by
Active
Active
Active
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V cc
Supply voltage
VI
Input voltage
VO
Output voltage
Pd
Power dissipation
T opr
Operating temperature
Tstg(bias) Storage temperature (bias)
T stg
Storage temperature
*Pulse width 20ns, In case of DC:-0.5V
Conditions
With respect to GND
Ta=25 C
Ratings
Unit
-3.5* ~ 7
V
-3.5 * ~ VCC+0.3 V
-3.5 * ~ VCC+0.3 V
1000
mW
0 ~ 70
C
-10 ~ 85
C
-65 ~ 150
C
DC ELECTRICAL CHARACTERISTICS (Ta=0 ~ 70 C, Vcc=5V±10% unless otherwise noted)
Symbol
Parameter
Condition
VIH High-level input voltage
VIL Low-level input voltage
VOH High-level output voltage IOH =-4mA
VOL Low-level output voltage IOL= 8mA
II
Input current
V I = 0~Vcc
I OZ
Output current in off-state
VI (S)= VIH
VO= 0~Vcc
Active supply current
I CC1 (TTL level)
VI (S)= VIL
other inputs V IH or VIL
Output-open(duty 100%)
Stand by current
I CC2 (TTL level)
I CC3 Stand by current
VI (S)= VIH
VI (S)= Vcc0.2V
other inputs VI0.2V
or VIVcc-0.2V
Limits
Min Typ Max Unit
2.2
Vcc+0.3 V
-0.3
0.8 V
2.4
V
0.4 V
2 µA
10 µA
12ns cycle
AC 15ns cycle
DC
12ns cycle
AC 15ns cycle
DC
160
150 mA
90 100
75
70 mA
50
1
10 mA
MITSUBISHI
ELECTRIC
2

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