CL7256S Ver la hoja de datos (PDF) - Clear Logic

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CL7256S

Laser Processed Logic Device Family

Clear Logic 

Key Features

CL7256E

CL7256S

Laser Processed Logic Device Family

u Laser Processed Logic Device (LPLD™) technology offers

the ultimate combination of performance, flexibility, and

low cost

u Functionally, architecturally, and electrically compatible

with industry-standard Altera® MAX® 7000

u High Density

- 5,000 Usable gates

- 256 Macrocells

- 184 Maximum user I/O pins

u Laser fuse technology provides very fast, dense

interconnect routing

u Low current consumption

u Supports 3.3 volt or 5.0 volt I/O operation

u Alpha particle immune

CL7000 Product Family Overview

Parameter

Useable Gates

Macrocells

Logic Blocks

Max user I/O pins

Speed Grades

Packages

CL7128E

CL7128S

2,500

128

8

100

-5, -6, -7, -10,

-12, -15, -20

84-pin PLCC

100-pin TQFP

100-pin PQFP

160-pin PQFP

CL7160E

CL7160S

3,200

160

10

104

-5, -6, -7, -10,

-12, -15, -20

84-pin PLCC

100-pin TQFP

100-pin PQFP

160-pin PQFP

CL7192E

CL7192S

3,750

192

12

124

-6, -7, -10,

-12, -15, -20

160-pin PQFP

CL7256E

CL7256S

5,000

256

16

164

-6, -7, -10,

-12, -15, -20

160-pin PQFP

208-pin PQFP

208-pin RQFP

7K tbl 01B

December 2000

Page 1

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