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LT1944-1EMS Ver la hoja de datos (PDF) - Linear Technology

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LT1944-1EMS
Linear
Linear Technology Linear
LT1944-1EMS Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
LT1944-1
TYPICAL PERFOR A CE CHARACTERISTICS
Switch Saturation Voltage
(VCESAT)
0.15
Feedback Pin Voltage and
Bias Current
1.25
50
0.13
1.24
40
ISWITCH = 100mA
0.10
VOLTAGE
ISWITCH = 70mA
1.23
30
0.08
1.22
CURRENT
20
0.05
0.03
1.21
10
0
–50 –25 0
25 50
TEMPERATURE (°C)
75 100
1944-1 G01
Switch Off Time
2000
1800
1600
1400
SWITCHER 2
1200
1000
800
600
SWITCHER 1
400
200
0
–50 –25 0 25 50
TEMPERATURE (°C)
75 100
1944-1 G04
1.20
–50
–25 0 25 50
TEMPERATURE (°C)
0
75 100
1944-1 G02
Switch Current Limit
200
VIN = 12V
175
VIN = 1.2V
150
SWITCHER 2
125
VIN = 12V
100
VIN = 1.2V
SWITCHER 1
75
50
–50 –25 0
25 50
TEMPERATURE (°C)
75 100
1944-1 G05
Quiescent Current
25
VFB = 1.23V
NOT SWITCHING
23
21
VIN = 12V
19
VIN = 1.2V
17
15
–50
–25 0 25 50
TEMPERATURE (°C)
75 100
1944-1 G03
Shutdown Pin Current
25
20
15
25°C
10
100°C
5
0
0
5
10
15
SHUTDOWN PIN VOLTAGE (V)
1944-1 G03
PI FU CTIO S
FB1 (Pin 1): Feedback Pin for Switcher 1. Set the output
voltage by selecting values for R1 and R2.
SHDN1 (Pin 2): Shutdown Pin for Switcher 1. Tie this pin
to 0.9V or higher to enable device. Tie below 0.25V to turn
it off.
GND (Pin 3): Ground. Tie this pin directly to the local
ground plane.
SHDN2 (Pin 4): Shutdown Pin for Switcher 2. Tie this pin
to 0.9V or higher to enable device. Tie below 0.25V to turn
it off.
FB2 (Pin 5): Feedback Pin for Switcher 2. Set the output
voltage by selecting values for R1B and R2B.
SW2 (Pin 6): Switch Pin for Switcher 2. This is the
collector of the internal NPN power switch. Minimize the
metal trace area connected to the pin to minimize EMI.
PGND (Pins 7, 9): Power Ground. Tie these pins directly
to the local ground plane. Both pins must be tied.
VIN (Pin 8): Input Supply Pin. Bypass this pin with a
capacitor as close to the device as possible.
SW1 (Pin 10): Switch Pin for Switcher 1. This is the
collector of the internal NPN power switch. Minimize the
metal trace area connected to the pin to minimize EMI.
3

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