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LTC1293DM Ver la hoja de datos (PDF) - Linear Technology

Número de pieza
componentes Descripción
Fabricante
LTC1293DM
Linear
Linear Technology Linear
LTC1293DM Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LTC1293/LTC1294/LTC1296
U
UW
CO VERTER A D ULTIPLEXER CHARACTERISTICS (Note 3)
PARAMETER
Offset Error
Linearity Error (INL)
Gain Error
Minimum Resolution for which No
Missing Codes are Guaranteed
Analog and REF Input Range
On Channel Leakage Current (Note 8)
Off Channel Lekage Current (Note 8)
CONDITIONS
(Note 4)
(Notes 4, 5)
(Note 4)
(Note 7)
On Channel = 5V
Off Channel = 0V
On Channel = 0V
Off Channel = 5V
On Channel = 5V
Off Channel = 0V
On Channel = 0V
Off Channel = 5V
LTC1293/4/6B LTC1293/4/6C LTC1293/4/6D
MIN TYP MAX MIN TYP MAX MIN TYP MAX
q
±3.0
±3.0
±3.0
q
±0.5
±0.5
±0.75
q
±0.5
±1.0
±4.0
q
12
12
12
(V)–0.05V to VCC + 0.05V
q
±1
±1
±1
q
±1
±1
±1
q
±1
±1
±1
q
±1
±1
±1
UNITS
LSB
LSB
LSB
Bits
V
µA
µA
µA
µA
AC CHARACTERISTICS (Note 3)
SYMBOL
fCLK
tSMPL
tCONV
tCYC
PARAMETER
Clock Frequency
Analog Input Sample Time
Conversion Time
Total Cycle Time
tdDO
tdis
ten
thDI
thDO
tf
tr
tWHCLK
tWLCLK
tsuDI
tsuCS
twHCS
twLCS
tenSSO
tdisSSO
CIN
Delay Time, CLKto DOUT Data Valid
Delay Time, CSto DOUT Hi-Z
Delay Time, CLKto DOUT Enabled
Hold Time, DIN after CLK
Time Output Data Remains Valid After CLK
DOUT Fall Time
DOUT Rise Time
CLK High Time
CLK Low Time
Set-up Time, DIN Stable Before CLK
Set-up Time, CSbefore CLK
CS High Time During Conversion
CS Low Time During Data Transfer
Delay Time, CLKto SSO
Delay Time, CSto SSO
Input Capacitance
CONDITIONS
VCC = 5V (Note 6)
See Operating Sequence
See Operating Sequence
See Operating Sequence (Note 6)
See Test Circuits
See Test Circuits
See Test Circuits
VCC = 5V (Note 6)
See Test Circuits
See Test Circuits
VCC = 5V (Note 6)
VCC = 5V (Note 6)
VCC = 5V (Note 6)
VCC = 5V (Note 6)
VCC = 5V (Note 6)
VCC = 5V (Note 6)
See Test Circuits
See Test Circuits
Analog Inputs On Channel
Analog Inputs Off Channel
Digital Inputs
LTC1293/4/6B
LTC1293/4/6C
LTC1293/4/6D
MIN TYP MAX
UNITS
0.1
1.0
MHz
2.5
CLK Cycles
12
CLK Cycles
21 CLK
+500ns
Cycles
q
160 300
ns
q
80 150
ns
q
80 200
ns
50
ns
130
ns
q
65 130
ns
q
25 50
ns
300
ns
400
ns
50
ns
50
ns
500
ns
21
CLK Cycles
q
750 1500
ns
q
250 500
ns
100
pF
5
5
3

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