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VG36256161A

CMOS Synchronous Dynamic RAM

Vanguard International Semiconductor  

VIS

Preliminary

VG36256401A

VG36256801A

VG36256161A

CMOS Synchronous Dynamic RAM

DC Characteristics (Recommended Operating Conditions unless otherwise noted)

Parameter

Symbol

Test Conditions

Operating current

Precharge standby

current in Power

down mode

Precharge standby

current in Nonpower

down mode

Active standby current

in Power

down mode

Active standby

current in Nonpower

down mode

Operating current

(Burst mode)

Refresh current

Self refresh Current

ICC1

ICC2P

ICC2PS

ICC2N

ICC2NS

ICC3P

ICC3PS

ICC3N

ICC3NS

ICC4

ICC5

ICC6

Burst length = 1

x4

One bank active

x8

tRC ≥ tRC(MIN.), Io = 0mA x16

CKE ≤ VIL(MAX.) tCK = min.

CKE ≤ VIL(MAX.) tCK = ∞

CKE ≥ VIH(MIN.) tCK = min.

CS ≥ VIH(MIN.)

Input signals are changed one

time during 2 CLK cycles.

CKE ≥ VIH(MIN.) tCK = ∞

CLK ≤ VIL(MAX.)

Input signals are stable.

CKE ≤ VIL(MAX.) tCK = min.

CKE ≤ VIL(MAX.) tCK = ∞

CKE ≥ VIH(MIN.) tCK = min.

CS ≥ VIH(MIN.)

Input signals are changed one

time during 2CLKs

CKE ≥ VIH(MIN.) tCK = ∞

CLK ≤ VIL(MAX.)

Input signals are stable.

tCK ≥ tCK(MIN. Io = 0mA

All banks Active

x4

x8

x16

tRC = 4 x tRC(MIN)

CKE≤ 0.2V

Input Ieakage current

(Inputs)

Intput leakage current

(I/O pins)

Output Low Voltage

Output High Voltage

lLI

lLO

VOL

VOH

VIN ≥ 0, VIN ≤ VDD(MAX)

Pins not under test = 0V

VOUT ≥ 0, VOUT ≤ VDD(MAX)

DQ# in H - Z., Dout Disabled

IOL = 2mA

IOH = -2mA

-75

Min Max

145

155

165

2

2

20

7

7

5

30

20

150

160

170

190

1

-1

1

-1.5 1.5

0.4

2.4

-8H

Min Max

115

125

135

2

2

20

7

7

5

30

20

120

130

140

190

1

-1

1

-1.5 1.5

0.4

2.4

Unit Notes

mA

1

mA

mA

mA

mA

mA

2

mA

3

mA

uA

uA

V

4

V

4

Notes : 1. ICC1 depends on output loading and cycle rates. Specified values are obtained with the output open.

In addition to this, ICC1 is measured on condition that addresses are changed only one time during tCK(MIN.).

2. ICC4 depends on output loading and cycle rates. Specified values are obtained with the output open.

In addition to this, ICC4 is measured on condition that addresses are changed only one time during tCK(MIN.).

3. ICC5 is measured on condition that addresses are changed only one time during tCK(MIN.)

4. For LVTTL compatible.

Document : 1G5-0155

Rev.1

Page 5

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