VG36256161A Ver la hoja de datos (PDF) - Vanguard International Semiconductor
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VG36256161A Datasheet PDF : 69 Pages
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VIS
Preliminary
VG36256401A
VG36256801A
VG36256161A
CMOS Synchronous Dynamic RAM
2.4 Operative Command Table Notes 1
(1/3)
Current CS RAS CAS WE Address
state
Command
Action
Notes
Idle
H X X XX
DESL
Nop or Power down
2
L H H XX
NOP or BST Nop or Power down
2
L H L H BA, CA, A10 READ/READA ILLEGAL
3
L H L L BA, CA, A10 WRIT/WRITA ILLEGAL
3
L L H H BR, RA
ACT
Row active
L L H L BA, A10
PRE/PALL Nop
L L L HX
REF/SELF Refresh or Self refresh
4
L L L L Op - Code MPS
Mode register access
Row active H X X X X
DESL
Nop
L H H XX
NOP or BST Nop
L H L H BA, CA, A10 READ/READA Begin read : Determine AP
5
L H L L BA, CA, A10 WRIT/WRITA Begin write : Determine AP
5
L L H H BA, RA
ACT
ILLEGAL
3
L L H L BA, A10
PRE/PALL Precharge
6
L L L HX
REF/SELF ILLEGAL
L L L L Op - Code MRS
ILLEGAL
Read
H X X XX
L H H HX
L H H LX
DESL
NOP
BST
Continue burst to end → Row active
Continue burst to end → Row active
Burst end → Row active
L H L H BA, CA, A10 READ/READA Term burst, new read : Determine AP
7
L H L L BA, CA, A10 WRIT/WRITA Term burst, start write : Determine AP
7,8
L L H H BA, RA
ACT
ILLEGAL
3
L L H L BA, A10
PRE/PALL Term burst, precharging
L L L HX
REF/SELF ILLEGAL
L L L L Op - Code MRS
ILLEGAL
Write
H X X XX
L H H HX
DESL
NOP
Continue burst to end → Write recovering
Continue burst to end → Write recovering
L H H LX
BST
Burst stop → Row active
L H L H BA, CA, A10 READ/READA Term burst, start read : determine AP
7,8
L H L L BA, CA, A10 WRIT/WRITA Term burst, new write : Determine AP
7
L L H H BA, RA
ACT
ILLEGAL
3
L L H L BA, A10
PRE/PALL Term burst, precharging
9
L L L HX
REF/SELF ILLEGAL
L L L L Op - Code MRS
ILLEGAL
Document : 1G5-0155
Rev.1
Page 10
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