VV5430 Ver la hoja de datos (PDF) - STMicroelectronics
Número de pieza
componentes Descripción
Fabricante
VV5430 Datasheet PDF : 33 Pages
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Device Details
VV5430
3.3 Pin List
Pin
1
7
10
13
15
24,31
27,34
41
42
48
2
3
4
5
6
8
9
43
44
45
46
47
14
25
26
Signal
Name
AVCC
AVDD
AVSS
VVDD
VGND
VSS
VDD
DVDD
DVSS
AGND
VBG
VOFF/VPED
DEC2V2
DEC2V7
-
EBCK
EVWT
VBLWT
VBLOOM
VRT
VCM
VREF2V7
AVO
CKOUT
CKIN
Typ
e
Description
PWR
PWR
GND
PWR
GND
GND
PWR
PWR
GND
GND
OA
IA
OA
OA
DNC
IA
IA
IA
OA
IA
IA
OA
OA
OD
ID
POWER SUPPLIES
Core analogue power and reference supplies.
Output stage power. AVDD3 output stage logic.
Output stage ground. AVSS3 output stage logic.
75ohm buffer supply.
75ohm buffer ground.
Digital padring & logic ground.
Digital padring & logic power.
Core digital power.
Core digital ground.
Core analogue ground and reference supplies.
ANALOGUE VOLTAGE REFERENCES
Internal bandgap reference voltage (1.22V nominal). Requires external 0.1uF
capacitor.
Pedestal DAC & offset comp. DAC bias. Connect to VBG or external refer-
ence.
Decouple 2.2V reference. Requires external 0.1uF capacitor.
Decouple 2.7V reference. Requires external 0.1uF capacitor.
Do NOT connect - for test use only
External black level bias. Internally generated. Decouple to VGND
External white pixel threshold for exposure control. Decouple to VGND
Defines white level for clamp circuitry. Requires external 0.1uF capacitor.
Anti-blooming voltage reference. Requires external 0.1uF capacitor.
Pixel reset voltage. Connect to VREF2V7 or external reference.
Offset DAC common mode input. Connect to VREF2V7.
Internally generated 2.7V reference. Requires external 4.7uF capacitor.
ANALOGUE OUTPUTS
Buffered Analogue video out. Can drive a doubly terminated 75ohm load.
SYSTEM CLOCKS
Oscillator output. Connect Crystal for standard timing.
Oscillator input. Connect Crystal for standard timing.
IMAGE CAPTURE TIMING SIGNALS
CD5430F-A
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