CY7C109B-25VC(2005) Ver la hoja de datos (PDF) - Cypress Semiconductor

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CY7C109B-25VC
(Rev.:2005)

128K x 8 Static RAM

Cypress Semiconductor 

Switching Waveforms (continued)

Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[13, 14]

ADDRESS

CE1

tWC

tSCE

CE2

WE

tSCE

tAW

tSA

tPWE

CY7C109B

CY7C1009B

tHA

OE

DATA I/O

NOTE 15

tHZOE

tSD

tHD

DATAIN VALID

Write Cycle No. 3 (WE Controlled, OE LOW)[14]

ADDRESS

CE1

tWC

tSCE

CE2

tSA

WE

DATA I/O

NOTE 15

tHZWE

tSCE

tAW

tPWE

tSD

DATA VALID

tHA

tHD

tLZWE

Notes:

13. Data I/O is high impedance if OE = VIH.

14. If CE1 goes HIGH or CE2 goes LOW simultaneously with WE going HIGH, the output remains in a high-impedance state.

15. During this period the I/Os are in the output state and input signals should not be applied.

Document #: 38-05038 Rev. *B

Page 7 of 11

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