ST18D952 Ver la hoja de datos (PDF) - STMicroelectronics

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ST18D952

DIGITAL SIGNAL PROCESSOR (DSP) CHIP

STMicroelectronics 

ST18952

Table 2.7 D950Core control (10 pins)

Pin name

RESET

RESET_OUT

LP

LPACK

MODE

IRD_WR

VCI

STACKX

STACKY

IDT_EN

Type

I

O

I

O

I

O

O

O

O

I

Description

Reset input. Active low.

Initializes the 950-Core to the RESET state.

Reset output (system reset). Active low.

Low power input. Active low.

Low power acknowledge. Active low.

Mode selection for Reset.

0: forces reset address to 0x0000

1: forces reset address to 0xFC00

Program memory read/write indicator.

Valid coprocessor instruction output.

Asserted low during the instruction cycle preceding a coprocessor instruc-

tion to enable operation of an external coprocessor.

X stack read/write instruction flag.

Y stack read/write instruction flag.

I-bus direct transfer enable (to BSU peripheral). Active low.

Table 2.8 Emulation unit (7 pins)

Pin name

ERQ

IDLE

HALTACK

SNAP

AXEBP

AYEBP

AIEBP_SCAN_EN

Type

I

O

O

O

I

I

I

Description

Emulator Halt Request. Active low.

Halts program execution and enters emulation mode.

Output flag asserted high when the processor is halted due to an emulation

halt request or a valid breakpoint condition.Asserted low when the proces-

sor is not Halted or during execution of an instruction under control of the

emulator.

Halt acknowledge. Active high.

Asserted high when the processor is halted from an Emulator Halt request

or when a valid Breakpoint condition is met.

Snapshot. Active high.

Asserted high when executing an instruction if Snapshot mode is enabled.

Enable breakpoint on X address bus when high.

Enable breakpoint on Y address bus when high.

Enable breakpoint on I address bus when high.

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