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RMWL26001

21–26.5 GHz Low Noise Amplifier MMIC

Fairchild Semiconductor 

Vdd (POSITIVE)

5 MIL THICK

ALUMINA

50Ω

100pF

10,000pF

10,000pF

100pF

100pF

DIE-ATTACH

80Au/20Sn

100pF

5 MIL THICK

ALUMINA

50Ω

RF INPUT

RF OUTPUT

100pF

100pF

2 MIL GAP

Vg (NEGATIVE)

L < 0.015"

(4 Places)

Note:

Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief.

Figure 4. Recommended Assembly Diagram

Recommended Procedure for Biasing and Operation

CAUTION: LOSS OF GATE VOLTAGE (VG) WHILE

DRAIN VOLTAGE (VD) IS PRESENT MAY DAMAGE THE

AMPLIFIER CHIP.

The following sequence of steps must be followed to

properly test the amplifier:

Step 1: Turn off RF input power.

Step 2: Connect the DC supply grounds to the grounds of

the chip carrier. Slowly apply negative gate bias supply

voltage of -1.5V to Vg.

Step 3: Slowly apply positive drain bias supply voltage of

+4V to Vd.

Step 4: Adjust gate bias voltage to set the quiescent

current of Idq = 65mA.

Step 5: After the bias condition is established, RF input

signal may now be applied at the appropriate frequency

band.

Step 6: Follow turn-off sequence of:

(i) Turn off RF input power,

(ii) Turn down and off drain voltage (Vd),

(iii) Turn down and off gate bias voltage (Vg).

©2004 Fairchild Semiconductor Corporation

RMWL26001 Rev. D

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